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15 lines
354 B
Markdown
15 lines
354 B
Markdown
# L2 Multicore
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* WB bridge for multiple cores
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* generate 1-4 core interfaces (slave WB-I, slave WB-D, OPMC extension (opcode/WIMG/...))
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* configurable load and store queues per interface (if pipelined buses)
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* point-of-coherency/snoop/sync/... logic
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* configurable-size shared L2 (extra tags for pinning, etc.?)
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* WB-I, WB-D master
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