cores
/
microwatt
mirror of https://github.com/antonblanchard/microwatt
3
1
Fork 1
Code Issues Projects Releases Wiki Activity
You cannot select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
master
caravel-mpw7-20221125
caravel-mpw7-20220822
branch-alias
trace-test
gitignore
litedram-update
liteeth-update
fix-sdcard
fpu-init
loadstore-init
core_debug-init
icache-unused-sig
icache-insn-u-state
dcache-unused-sig
unused-sig
divider-init
loadstore-pmu-init
icache-pmu-events
fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
caravel-mpw5-20220322
alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
jtag-port-2
jtag-port
nia-debug
Branches Tags
${ item.name }
Create tag ${ searchTerm }
Create branch ${ searchTerm }
from 'c2d44b25ae'
${ noResults }
microwatt/constraints/ecpix-5.lpf

360 lines
14 KiB
Plaintext
Raw Normal View History Unescape Escape

ECPIX-5: Add basic support Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
8 months ago
LOCATE COMP "ext_clk" SITE "K23";
IOBUF PORT "ext_clk" IO_TYPE=LVCMOS33;
LOCATE COMP "ext_rst_n" SITE "N5";
LOCATE COMP "gsrn" SITE "AB1";
IOBUF PORT "ext_rst_n" IO_TYPE=LVCMOS33;
IOBUF PORT "gsrn" IO_TYPE=LVCMOS33;
LOCATE COMP "uart0_txd" SITE "R24";
LOCATE COMP "uart0_rxd" SITE "R26";
IOBUF PORT "uart0_txd" IO_TYPE=LVCMOS33;
IOBUF PORT "uart0_rxd" IO_TYPE=LVCMOS33;
LOCATE COMP "led5_r_n" SITE "T23";
LOCATE COMP "led5_g_n" SITE "R21";
LOCATE COMP "led5_b_n" SITE "T22";
IOBUF PORT "led5_r_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led5_g_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led5_b_n" IO_TYPE=LVCMOS33;
LOCATE COMP "led6_r_n" SITE "U21";
LOCATE COMP "led6_g_n" SITE "W21";
LOCATE COMP "led6_b_n" SITE "T24";
IOBUF PORT "led6_r_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led6_g_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led6_b_n" IO_TYPE=LVCMOS33;
LOCATE COMP "led7_r_n" SITE "K21";
LOCATE COMP "led7_g_n" SITE "K24";
LOCATE COMP "led7_b_n" SITE "M21";
IOBUF PORT "led7_r_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led7_g_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led7_b_n" IO_TYPE=LVCMOS33;
LOCATE COMP "led8_r_n" SITE "P21";
LOCATE COMP "led8_g_n" SITE "R23";
LOCATE COMP "led8_b_n" SITE "P22";
IOBUF PORT "led8_r_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led8_g_n" IO_TYPE=LVCMOS33;
IOBUF PORT "led8_b_n" IO_TYPE=LVCMOS33;
ECPIX-5: Wire up SPI flash The flash chip on my board is an ISSI IS26LP256P chip. The ISSI chip requires slightly different setup for quad mode from the other brands, but works fine with the existing SPI flash interface logic here. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
8 months ago
// We use USRMCLK instead for clk
// LOCATE COMP "spi_flash_clk" SITE "U16";
// IOBUF PORT "spi_flash_clk" IO_TYPE=LVCMOS33;
LOCATE COMP "spi_flash_cs_n" SITE "AA2";
IOBUF PORT "spi_flash_cs_n" IO_TYPE=LVCMOS33;
LOCATE COMP "spi_flash_mosi" SITE "AE2";
IOBUF PORT "spi_flash_mosi" IO_TYPE=LVCMOS33;
LOCATE COMP "spi_flash_miso" SITE "AD2";
IOBUF PORT "spi_flash_miso" IO_TYPE=LVCMOS33;
LOCATE COMP "spi_flash_wp_n" SITE "AF2";
IOBUF PORT "spi_flash_wp_n" IO_TYPE=LVCMOS33;
LOCATE COMP "spi_flash_hold_n" SITE "AE1";
IOBUF PORT "spi_flash_hold_n" IO_TYPE=LVCMOS33;
ECPIX-5: Add pin definitions for the PMOD ports Not wired to anything at this point. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
8 months ago
ECPIX-5: Add liteeth support Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
8 months ago
// Ethernet
LOCATE COMP "rgmii_clocks_rx" SITE "E11";
LOCATE COMP "rgmii_clocks_tx" SITE "A12";
LOCATE COMP "rgmii_rst_n" SITE "C13";
LOCATE COMP "rgmii_int_n" SITE "B13";
LOCATE COMP "rgmii_mdc" SITE "C11";
LOCATE COMP "rgmii_mdio" SITE "A13";
LOCATE COMP "rgmii_rx_ctl" SITE "A11";
LOCATE COMP "rgmii_rx_data[0]" SITE "B11";
LOCATE COMP "rgmii_rx_data[1]" SITE "A10";
LOCATE COMP "rgmii_rx_data[2]" SITE "B10";
LOCATE COMP "rgmii_rx_data[3]" SITE "A9";
LOCATE COMP "rgmii_tx_ctl" SITE "C9";
LOCATE COMP "rgmii_tx_data[0]" SITE "D8";
LOCATE COMP "rgmii_tx_data[1]" SITE "C8";
LOCATE COMP "rgmii_tx_data[2]" SITE "B8";
LOCATE COMP "rgmii_tx_data[3]" SITE "A8";
IOBUF PORT "rgmii_clocks_rx" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_clocks_tx" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_rst_n" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_int_n" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_mdc" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_mdio" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_rx_ctl" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_rx_data[0]" IO_TYPE=LVCMOS33 PULLMODE=UP;
IOBUF PORT "rgmii_rx_data[1]" IO_TYPE=LVCMOS33 PULLMODE=UP;
IOBUF PORT "rgmii_rx_data[2]" IO_TYPE=LVCMOS33 PULLMODE=UP;
IOBUF PORT "rgmii_rx_data[3]" IO_TYPE=LVCMOS33 PULLMODE=UP;
IOBUF PORT "rgmii_tx_ctl" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_tx_data[0]" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_tx_data[1]" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_tx_data[2]" IO_TYPE=LVCMOS33;
IOBUF PORT "rgmii_tx_data[3]" IO_TYPE=LVCMOS33;
FREQUENCY PORT "eth_rx_clk" 125.0 MHz;
FREQUENCY PORT "eth_tx_clk" 125.0 MHz;
FREQUENCY PORT "rgmii_clocks_rx" 125.0 MHz;
ECPIX-5: Add litesdcard support Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
8 months ago
// SD card slot and level translator
LOCATE COMP "sdcard_data[0]" SITE "N26";
LOCATE COMP "sdcard_data[1]" SITE "N25";
LOCATE COMP "sdcard_data[2]" SITE "N23";
LOCATE COMP "sdcard_data[3]" SITE "N21";
LOCATE COMP "sdcard_cmd" SITE "M24";
LOCATE COMP "sdcard_clk" SITE "P24";
LOCATE COMP "sdcard_cd" SITE "L22";
LOCATE COMP "sdcard_cmd_dir" SITE "M23";
LOCATE COMP "sdcard_dat0_dir" SITE "N24";
LOCATE COMP "sdcard_dat13_dir" SITE "P26";
LOCATE COMP "sdcard_vsel" SITE "L24";
IOBUF PORT "sdcard_data[0]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_data[1]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_data[2]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_data[3]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_cmd" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_clk" IO_TYPE=LVCMOS33 SLEWRATE=FAST;
IOBUF PORT "sdcard_cd" IO_TYPE=LVCMOS33;
IOBUF PORT "sdcard_cmd_dir" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_dat0_dir" IO_TYPE=LVCMOS33 SLEWRATE=FAST;
IOBUF PORT "sdcard_dat13_dir" IO_TYPE=LVCMOS33 SLEWRATE=FAST;
IOBUF PORT "sdcard_vsel" IO_TYPE=LVCMOS33 PULLMODE=DOWN;
ECPIX-5: Add litedram support Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
8 months ago
// DDR3 SDRAM
LOCATE COMP "ddram_a[0]" SITE "T5";
LOCATE COMP "ddram_a[1]" SITE "M3";
LOCATE COMP "ddram_a[2]" SITE "L3";
LOCATE COMP "ddram_a[3]" SITE "V6";
LOCATE COMP "ddram_a[4]" SITE "K2";
LOCATE COMP "ddram_a[5]" SITE "W6";
LOCATE COMP "ddram_a[6]" SITE "K3";
LOCATE COMP "ddram_a[7]" SITE "L1";
LOCATE COMP "ddram_a[8]" SITE "H2";
LOCATE COMP "ddram_a[9]" SITE "L2";
LOCATE COMP "ddram_a[10]" SITE "N1";
LOCATE COMP "ddram_a[11]" SITE "J1";
LOCATE COMP "ddram_a[12]" SITE "M1";
LOCATE COMP "ddram_a[13]" SITE "K1";
LOCATE COMP "ddram_a[14]" SITE "H1";
IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[1]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[2]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[3]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[4]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[5]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[6]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[7]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[8]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[9]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[10]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[11]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[12]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[13]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_a[14]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
LOCATE COMP "ddram_ba[0]" SITE "U6";
LOCATE COMP "ddram_ba[1]" SITE "N3";
LOCATE COMP "ddram_ba[2]" SITE "N4";
LOCATE COMP "ddram_ras_n" SITE "T3";
LOCATE COMP "ddram_cas_n" SITE "P2";
LOCATE COMP "ddram_we_n" SITE "R3";
LOCATE COMP "ddram_dm[0]" SITE "U4";
LOCATE COMP "ddram_dm[1]" SITE "U1";
IOBUF PORT "ddram_ba[0]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_ba[1]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_ba[2]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_ras_n" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_cas_n" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_we_n" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_dm[0]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_dm[1]" IO_TYPE=SSTL15_I SLEWRATE=FAST;
LOCATE COMP "ddram_dq[0]" SITE "T4";
LOCATE COMP "ddram_dq[1]" SITE "W4";
LOCATE COMP "ddram_dq[2]" SITE "R4";
LOCATE COMP "ddram_dq[3]" SITE "W5";
LOCATE COMP "ddram_dq[4]" SITE "R6";
LOCATE COMP "ddram_dq[5]" SITE "P6";
LOCATE COMP "ddram_dq[6]" SITE "P5";
LOCATE COMP "ddram_dq[7]" SITE "P4";
LOCATE COMP "ddram_dq[8]" SITE "R1";
LOCATE COMP "ddram_dq[9]" SITE "W3";
LOCATE COMP "ddram_dq[10]" SITE "T2";
LOCATE COMP "ddram_dq[11]" SITE "V3";
LOCATE COMP "ddram_dq[12]" SITE "U3";
LOCATE COMP "ddram_dq[13]" SITE "W1";
LOCATE COMP "ddram_dq[14]" SITE "T1";
LOCATE COMP "ddram_dq[15]" SITE "W2";
IOBUF PORT "ddram_dq[0]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[1]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[2]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[3]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[4]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[5]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[6]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[7]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[8]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[9]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[10]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[11]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[12]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[13]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[14]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
IOBUF PORT "ddram_dq[15]" IO_TYPE=SSTL15_I SLEWRATE=FAST TERMINATION=75;
LOCATE COMP "ddram_dqs_n[0]" SITE "U5";
LOCATE COMP "ddram_dqs_n[1]" SITE "U2";
LOCATE COMP "ddram_dqs_p[0]" SITE "V4";
LOCATE COMP "ddram_dqs_p[1]" SITE "V1";
IOBUF PORT "ddram_dqs_n[0]" IO_TYPE=SSTL15D_I SLEWRATE=FAST DIFFRESISTOR=100 TERMINATION=OFF;
IOBUF PORT "ddram_dqs_n[1]" IO_TYPE=SSTL15D_I SLEWRATE=FAST DIFFRESISTOR=100 TERMINATION=OFF;
IOBUF PORT "ddram_dqs_p[0]" IO_TYPE=SSTL15D_I SLEWRATE=FAST DIFFRESISTOR=100 TERMINATION=OFF;
IOBUF PORT "ddram_dqs_p[1]" IO_TYPE=SSTL15D_I SLEWRATE=FAST DIFFRESISTOR=100 TERMINATION=OFF;
LOCATE COMP "ddram_clk_p" SITE "H3";
LOCATE COMP "ddram_clk_n" SITE "J3";
IOBUF PORT "ddram_clk_p" IO_TYPE=SSTL15D_I SLEWRATE=FAST;
IOBUF PORT "ddram_clk_n" IO_TYPE=SSTL15D_I SLEWRATE=FAST;
LOCATE COMP "ddram_cke" SITE "P1";
LOCATE COMP "ddram_odt" SITE "P3";
IOBUF PORT "ddram_cke" IO_TYPE=SSTL15_I SLEWRATE=FAST;
IOBUF PORT "ddram_odt" IO_TYPE=SSTL15_I SLEWRATE=FAST;
ECPIX-5: Add pin definitions for the PMOD ports Not wired to anything at this point. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
8 months ago
// PMOD signals
LOCATE COMP "pmod0_0" SITE "T25";
IOBUF PORT "pmod0_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod0_1" SITE "U25";
IOBUF PORT "pmod0_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod0_2" SITE "U24";
IOBUF PORT "pmod0_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod0_3" SITE "V24";
IOBUF PORT "pmod0_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod0_4" SITE "T26";
IOBUF PORT "pmod0_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod0_5" SITE "U26";
IOBUF PORT "pmod0_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod0_6" SITE "V26";
IOBUF PORT "pmod0_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod0_7" SITE "W26";
IOBUF PORT "pmod0_7" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_0" SITE "U23";
IOBUF PORT "pmod1_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_1" SITE "V23";
IOBUF PORT "pmod1_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_2" SITE "U22";
IOBUF PORT "pmod1_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_3" SITE "V21";
IOBUF PORT "pmod1_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_4" SITE "W25";
IOBUF PORT "pmod1_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_5" SITE "W24";
IOBUF PORT "pmod1_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_6" SITE "W23";
IOBUF PORT "pmod1_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod1_7" SITE "W22";
IOBUF PORT "pmod1_7" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_0" SITE "J24";
IOBUF PORT "pmod2_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_1" SITE "H22";
IOBUF PORT "pmod2_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_2" SITE "E21";
IOBUF PORT "pmod2_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_3" SITE "D18";
IOBUF PORT "pmod2_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_4" SITE "K22";
IOBUF PORT "pmod2_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_5" SITE "J21";
IOBUF PORT "pmod2_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_6" SITE "H21";
IOBUF PORT "pmod2_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod2_7" SITE "D22";
IOBUF PORT "pmod2_7" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_0" SITE "E4";
IOBUF PORT "pmod3_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_1" SITE "F4";
IOBUF PORT "pmod3_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_2" SITE "E6";
IOBUF PORT "pmod3_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_3" SITE "H4";
IOBUF PORT "pmod3_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_4" SITE "F3";
IOBUF PORT "pmod3_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_5" SITE "D4";
IOBUF PORT "pmod3_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_6" SITE "D5";
IOBUF PORT "pmod3_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod3_7" SITE "F5";
IOBUF PORT "pmod3_7" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_0" SITE "E26";
IOBUF PORT "pmod4_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_1" SITE "D25";
IOBUF PORT "pmod4_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_2" SITE "F26";
IOBUF PORT "pmod4_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_3" SITE "F25";
IOBUF PORT "pmod4_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_4" SITE "C26";
IOBUF PORT "pmod4_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_5" SITE "C25";
IOBUF PORT "pmod4_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_6" SITE "A25";
IOBUF PORT "pmod4_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod4_7" SITE "A24";
IOBUF PORT "pmod4_7" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_0" SITE "D19";
IOBUF PORT "pmod5_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_1" SITE "C21";
IOBUF PORT "pmod5_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_2" SITE "B21";
IOBUF PORT "pmod5_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_3" SITE "C22";
IOBUF PORT "pmod5_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_4" SITE "D21";
IOBUF PORT "pmod5_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_5" SITE "A21";
IOBUF PORT "pmod5_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_6" SITE "A22";
IOBUF PORT "pmod5_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod5_7" SITE "A23";
IOBUF PORT "pmod5_7" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_0" SITE "C16";
IOBUF PORT "pmod6_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_1" SITE "B17";
IOBUF PORT "pmod6_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_2" SITE "C18";
IOBUF PORT "pmod6_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_3" SITE "B19";
IOBUF PORT "pmod6_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_4" SITE "A17";
IOBUF PORT "pmod6_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_5" SITE "A18";
IOBUF PORT "pmod6_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_6" SITE "A19";
IOBUF PORT "pmod6_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod6_7" SITE "C19";
IOBUF PORT "pmod6_7" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_0" SITE "D14";
IOBUF PORT "pmod7_0" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_1" SITE "B14";
IOBUF PORT "pmod7_1" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_2" SITE "E14";
IOBUF PORT "pmod7_2" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_3" SITE "B16";
IOBUF PORT "pmod7_3" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_4" SITE "C14";
IOBUF PORT "pmod7_4" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_5" SITE "A14";
IOBUF PORT "pmod7_5" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_6" SITE "A15";
IOBUF PORT "pmod7_6" IO_TYPE=LVCMOS33;
LOCATE COMP "pmod7_7" SITE "A16";
IOBUF PORT "pmod7_7" IO_TYPE=LVCMOS33;