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tests/mmu: Update to use correct MSR values

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The tests were using MSR values that did not have MSR_SF or MSR_LE
set.  Fix this so that the test still works when 32-bit and BE modes
are implemented.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
pull/239/head
Paul Mackerras 4 years ago
parent 6d6cf59bb7
commit 3edc95eea5
2 changed files with 28 additions and 19 deletions
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47
tests/mmu/mmu.c
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@ -4,8 +4,10 @@


#include "console.h" #include "console.h"


#define MSR_LE 0x1
#define MSR_DR 0x10 #define MSR_DR 0x10
#define MSR_IR 0x20 #define MSR_IR 0x20
#define MSR_SF 0x8000000000000000ul


extern int test_read(long *addr, long *ret, long init); extern int test_read(long *addr, long *ret, long init);
extern int test_write(long *addr, long val); extern int test_write(long *addr, long val);
@ -445,10 +447,11 @@ int mmu_test_11(void)
unsigned long ptr = 0x523000; unsigned long ptr = 0x523000;


/* this should fail */ /* this should fail */
if (test_exec(0, ptr, MSR_IR)) if (test_exec(0, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* SRR0 and SRR1 should be set correctly */ /* SRR0 and SRR1 should be set correctly */
if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x40000020) if (mfspr(SRR0) != (long) ptr ||
mfspr(SRR1) != (MSR_SF | 0x40000000 | MSR_IR | MSR_LE))
return 2; return 2;
return 0; return 0;
} }
@ -462,12 +465,12 @@ int mmu_test_12(void)
/* create PTE */ /* create PTE */
map((void *)ptr, (void *)mem, PERM_EX | REF); map((void *)ptr, (void *)mem, PERM_EX | REF);
/* this should succeed and be a cache miss */ /* this should succeed and be a cache miss */
if (!test_exec(0, ptr, MSR_IR)) if (!test_exec(0, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* create a second PTE */ /* create a second PTE */
map((void *)ptr2, (void *)mem, PERM_EX | REF); map((void *)ptr2, (void *)mem, PERM_EX | REF);
/* this should succeed and be a cache hit */ /* this should succeed and be a cache hit */
if (!test_exec(0, ptr2, MSR_IR)) if (!test_exec(0, ptr2, MSR_SF | MSR_IR | MSR_LE))
return 2; return 2;
return 0; return 0;
} }
@ -481,17 +484,18 @@ int mmu_test_13(void)
/* create a PTE */ /* create a PTE */
map((void *)ptr, (void *)mem, PERM_EX | REF); map((void *)ptr, (void *)mem, PERM_EX | REF);
/* this should succeed */ /* this should succeed */
if (!test_exec(1, ptr, MSR_IR)) if (!test_exec(1, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* invalidate the PTE */ /* invalidate the PTE */
unmap((void *)ptr); unmap((void *)ptr);
/* install a second PTE */ /* install a second PTE */
map((void *)ptr2, (void *)mem, PERM_EX | REF); map((void *)ptr2, (void *)mem, PERM_EX | REF);
/* this should fail */ /* this should fail */
if (test_exec(1, ptr, MSR_IR)) if (test_exec(1, ptr, MSR_SF | MSR_IR | MSR_LE))
return 2; return 2;
/* SRR0 and SRR1 should be set correctly */ /* SRR0 and SRR1 should be set correctly */
if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x40000020) if (mfspr(SRR0) != (long) ptr ||
mfspr(SRR1) != (MSR_SF | 0x40000000 | MSR_IR | MSR_LE))
return 3; return 3;
return 0; return 0;
} }
@ -506,15 +510,16 @@ int mmu_test_14(void)
/* create a PTE */ /* create a PTE */
map((void *)ptr, (void *)mem, PERM_EX | REF); map((void *)ptr, (void *)mem, PERM_EX | REF);
/* this should fail due to second page not being mapped */ /* this should fail due to second page not being mapped */
if (test_exec(2, ptr, MSR_IR)) if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* SRR0 and SRR1 should be set correctly */ /* SRR0 and SRR1 should be set correctly */
if (mfspr(SRR0) != ptr2 || mfspr(SRR1) != 0x40000020) if (mfspr(SRR0) != ptr2 ||
mfspr(SRR1) != (MSR_SF | 0x40000000 | MSR_IR | MSR_LE))
return 2; return 2;
/* create a PTE for the second page */ /* create a PTE for the second page */
map((void *)ptr2, (void *)mem2, PERM_EX | REF); map((void *)ptr2, (void *)mem2, PERM_EX | REF);
/* this should succeed */ /* this should succeed */
if (!test_exec(2, ptr, MSR_IR)) if (!test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
return 3; return 3;
return 0; return 0;
} }
@ -527,10 +532,11 @@ int mmu_test_15(void)
/* create a PTE without execute permission */ /* create a PTE without execute permission */
map((void *)ptr, (void *)mem, DFLT_PERM); map((void *)ptr, (void *)mem, DFLT_PERM);
/* this should fail */ /* this should fail */
if (test_exec(0, ptr, MSR_IR)) if (test_exec(0, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* SRR0 and SRR1 should be set correctly */ /* SRR0 and SRR1 should be set correctly */
if (mfspr(SRR0) != ptr || mfspr(SRR1) != 0x10000020) if (mfspr(SRR0) != ptr ||
mfspr(SRR1) != (MSR_SF | 0x10000000 | MSR_IR | MSR_LE))
return 2; return 2;
return 0; return 0;
} }
@ -547,15 +553,16 @@ int mmu_test_16(void)
/* create a PTE for the second page without execute permission */ /* create a PTE for the second page without execute permission */
map((void *)ptr2, (void *)mem2, PERM_RD | REF); map((void *)ptr2, (void *)mem2, PERM_RD | REF);
/* this should fail due to second page being no-execute */ /* this should fail due to second page being no-execute */
if (test_exec(2, ptr, MSR_IR)) if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* SRR0 and SRR1 should be set correctly */ /* SRR0 and SRR1 should be set correctly */
if (mfspr(SRR0) != ptr2 || mfspr(SRR1) != 0x10000020) if (mfspr(SRR0) != ptr2 ||
mfspr(SRR1) != (MSR_SF | 0x10000000 | MSR_IR | MSR_LE))
return 2; return 2;
/* create a PTE for the second page with execute permission */ /* create a PTE for the second page with execute permission */
map((void *)ptr2, (void *)mem2, PERM_RD | PERM_EX | REF); map((void *)ptr2, (void *)mem2, PERM_RD | PERM_EX | REF);
/* this should succeed */ /* this should succeed */
if (!test_exec(2, ptr, MSR_IR)) if (!test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
return 3; return 3;
return 0; return 0;
} }
@ -568,20 +575,22 @@ int mmu_test_17(void)
/* create a PTE without the ref bit set */ /* create a PTE without the ref bit set */
map((void *)ptr, (void *)mem, PERM_EX); map((void *)ptr, (void *)mem, PERM_EX);
/* this should fail */ /* this should fail */
if (test_exec(2, ptr, MSR_IR)) if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* SRR0 and SRR1 should be set correctly */ /* SRR0 and SRR1 should be set correctly */
if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x00040020) if (mfspr(SRR0) != (long) ptr ||
mfspr(SRR1) != (MSR_SF | 0x00040000 | MSR_IR | MSR_LE))
return 2; return 2;
/* create a PTE without ref or execute permission */ /* create a PTE without ref or execute permission */
unmap((void *)ptr); unmap((void *)ptr);
map((void *)ptr, (void *)mem, 0); map((void *)ptr, (void *)mem, 0);
/* this should fail */ /* this should fail */
if (test_exec(2, ptr, MSR_IR)) if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
return 1; return 1;
/* SRR0 and SRR1 should be set correctly */ /* SRR0 and SRR1 should be set correctly */
/* RC update fail bit should not be set */ /* RC update fail bit should not be set */
if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x10000020) if (mfspr(SRR0) != (long) ptr ||
mfspr(SRR1) != (MSR_SF | 0x10000000 | MSR_IR | MSR_LE))
return 2; return 2;
return 0; return 0;
} }

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