Merge pull request #331 from ozbenh/misc

jtag tooling improvements & gitignore fix
pull/332/head
Anton Blanchard 3 years ago committed by GitHub
commit 537e446562
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GPG Key ID: 4AEE18F83AFDEB23

1
.gitignore vendored

@ -13,4 +13,5 @@ tests/*/*.hex
tests/*/*.elf
TAGS
litedram/build/*
liteeth/build/*
obj_dir/*

@ -0,0 +1,6 @@
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none
adapter_khz 25000

@ -7,7 +7,7 @@ import sys

BASE = os.path.dirname(os.path.abspath(__file__))

def flash(config, flash_proxy, address, data, filetype="", set_qe=False):
def flash(cable, config, flash_proxy, address, data, filetype="", set_qe=False):
script = "; ".join([
"init",
"jtagspi_init 0 {{{}}}".format(flash_proxy),
@ -17,7 +17,7 @@ def flash(config, flash_proxy, address, data, filetype="", set_qe=False):
"exit"
])
print(script)
subprocess.call(["openocd", "-f", config, "-c", script])
subprocess.call(["openocd", "-f", cable, "-f", config, "-c", script])

def get_version():
a = subprocess.run(["openocd", "-v"], capture_output=True)
@ -33,6 +33,7 @@ parser.add_argument("file", help="file to write to flash")
parser.add_argument("-a", "--address", help="offset in flash", type=lambda x: int(x,0), default=0)
parser.add_argument("-f", "--fpga", help="a35, a100 or a200", default="a35")
parser.add_argument("-t", "--filetype", help="file type such as 'bin'", default="")
parser.add_argument("-c", "--cable", help="cable type such as 'arty'", default="arty")
args = parser.parse_args()

version = get_version()
@ -49,5 +50,6 @@ else:

proxy = os.path.join(BASE, proxy)
config = os.path.join(BASE, "xilinx-xc7{}.cfg".format(version))
cable = os.path.join(BASE, "{}.cfg".format(args.cable))

flash(config, proxy, args.address, args.file, args.filetype.lower())
flash(cable, config, proxy, args.address, args.file, args.filetype.lower())

@ -1,9 +1,3 @@
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none
adapter_khz 25000

source [find cpld/xilinx-xc7.cfg]


@ -1,13 +1,6 @@
# This file is the same sa xilinx-xc7.cfg, except we use
# verify_image instead of verify_bank

interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none
adapter_khz 25000

source [find cpld/xilinx-xc7.cfg]

# From jtagspi.cfg with modification to support

@ -220,7 +220,7 @@ static int jtag_init(const char *target)
int rc, part;

if (!target)
target = "DigilentHS1";
target = "probe";
sep = strchr(target, ':');
cable = strndup(target, sep - target);
if (sep && *sep) {
@ -237,6 +237,15 @@ static int jtag_init(const char *target)
}
jc->main_part = 0;

if (strcmp(cable, "probe") == 0) {
char *cparams[] = { NULL, NULL,};
rc = urj_tap_cable_usb_probe(cparams);
if (rc != URJ_STATUS_OK) {
fprintf(stderr, "JTAG cable probe failed\n");
return -1;
}
cable = strdup(cparams[1]);
}
rc = urj_tap_chain_connect(jc, cable, params);
if (rc != URJ_STATUS_OK) {
fprintf(stderr, "JTAG cable detect failed\n");
@ -735,10 +744,8 @@ int main(int argc, char *argv[])
}
}

if (b == NULL) {
fprintf(stderr, "No backend selected\n");
exit(1);
}
if (b == NULL)
b = &jtag_backend;

rc = b->init(target);
if (rc < 0)

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