Merge pull request #317 from antonblanchard/gpio-fix

gpio: Add HAS_GPIO to avoid verilator build errors

fpga/top-arty.vhdl

@@ -28,6 +28,7 @@ entity toplevel is
         UART_IS_16550      : boolean  := false;
         HAS_UART1          : boolean  := true;
         USE_LITESDCARD     : boolean := false;
+        HAS_GPIO           : boolean := true;
         NGPIO              : natural := 32
         );
     port(
@@ -207,6 +208,7 @@ begin
             UART0_IS_16550     => UART_IS_16550,
             HAS_UART1          => HAS_UART1,
             HAS_SD_CARD        => USE_LITESDCARD,
+            HAS_GPIO           => HAS_GPIO,
             NGPIO              => NGPIO
             )
         port map (

soc.vhdl

@@ -81,7 +81,8 @@ entity soc is
         DCACHE_TLB_SET_SIZE : natural := 64;
         DCACHE_TLB_NUM_WAYS : natural := 2;
         HAS_SD_CARD        : boolean := false;
-        NGPIO              : natural := 0
+        HAS_GPIO           : boolean := false;
+        NGPIO              : natural := 32
 	);
     port(
 	rst          : in  std_ulogic;
@@ -913,6 +914,7 @@ begin
             icp_out => ics_to_icp
 	    );
 
+    gpio0_gen: if HAS_GPIO generate
         gpio : entity work.gpio
             generic map(
                 NGPIO => NGPIO
@@ -927,6 +929,7 @@ begin
                 gpio_dir => gpio_dir,
                 intr     => gpio_intr
                 );
+    end generate;
 
     -- Assign external interrupts
     interrupts: process(all)