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microwatt/scripts
Paul Mackerras d2bf3f3580 core: Implement hypervisor doorbell interrupt and msg* instructions
This implements the hypervisor doorbell exception and interrupt and
the msgsnd, msgclr and msgsync instructions (msgsync is a no-op).  The
msgsnd instruction can generate a hypervisor doorbell interrupt on any
CPU in the system.  To achieve this, each core sends its hypervisor
doorbell messages to the soc level, which ORs together the bits for
each CPU and sends it to that CPU.

The privileged doorbell exception/interrupt and the msgsndp/msgclrp
instructions are not required since we don't implement SMT.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
1 week ago
..
fmt_log core: Implement hypervisor doorbell interrupt and msg* instructions 1 week ago
mw_debug core: Implement LPCR register 5 months ago
bin2hex.py bin2hex: Make sure to generate little endian files 5 years ago
dependencies.py uart: Rename sim_uart.vhdl to sim_pp_uart.vhdl 5 years ago
gen_icache_tb.py icache_tb: Improve test and include test file 6 years ago
make_version.sh syscon: Implement a register for storing git hash info 3 years ago
make_version_fusesoc.py syscon: Implement a register for storing git hash info 3 years ago
run_test.sh scripts/run_test: Use grep -E instead of egrep 2 years ago
run_test_console.sh test: Add test for metavalues 3 years ago
test_micropython.py Update micropython 6 years ago
test_micropython_long.py Update micropython 6 years ago
test_micropython_verilator.py makefile: Add some verilator micropython tests 4 years ago
test_micropython_verilator_long.py makefile: Add some verilator micropython tests 4 years ago
vhdltags Add VHDL TAGS 5 years ago