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Paul Mackerras 470f1b2140 core_debug: Add an address trigger to stop logging at a given address 
This compares the address being fetched with the contents of a
register that can be set via DMI, and if they match, stops the
logging.  Since this works on the address being fetched rather than
executed, it is subject to false positives.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
..
fmt_log core: Add framework for an FPU
mw_debug core_debug: Add an address trigger to stop logging at a given address
bin2hex.py bin2hex: Make sure to generate little endian files
dependencies.py uart: Rename sim_uart.vhdl to sim_pp_uart.vhdl
gen_icache_tb.py icache_tb: Improve test and include test file
run_test.sh Dump CTR, LR and CR on sim termination, and update our tests
run_test_console.sh Add test cases for new exceptions and supervisor state
test_micropython.py Update micropython
test_micropython_long.py Update micropython
vhdltags Add VHDL TAGS