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7f1f6b8525
This adds support for initializing the memory controller from microwatt rather than using a built-in RiscV processor. This might require some fixes to LiteX and LiteDRAM (they haven't been merged as of this commit yet). This is enabled in the shipped generated files and can be changed via modifying the generator script to pass False to "mw_init" Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
4 years ago | |
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| .. | ||
| include | 4 years ago | |
| libc | 4 years ago | |
| Makefile | 4 years ago | |
| bin2hex.py | 4 years ago | |
| head.S | 4 years ago | |
| main.c | 4 years ago | |
| sdram_init.lds | 4 years ago | |