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microwatt/litedram/gen-src
Michael Neuling 9bbef035a6
Merge pull request #212 from ozbenh/liteeth
liteeth: Hook up LiteX LiteEth ethernet controller
4 years ago
..
sdram_init Merge pull request #212 from ozbenh/liteeth 4 years ago
arty.yml litedram: Remove old "VexRiscV" based initializations 5 years ago
dram-init-mem.vhdl litedram: Fix DRAM init mem using too many address bits 5 years ago
generate.py litedram: Remove old "VexRiscV" based initializations 5 years ago
nexys-video.yml litedram: Remove old "VexRiscV" based initializations 5 years ago
no-init-mem.vhdl litedram: Split the init memory from the main wrapper 5 years ago
sim.yml litedram: Remove old "VexRiscV" based initializations 5 years ago