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caravel-mpw7-20221125
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trace-test
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litedram-update
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fix-sdcard
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microwatt/litesdcard
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Paul Mackerras c1f23e7417 litesdcard: Regenerate verilog code with buffer direction controls 
This regenerates the verilog code from upstream litex plus a patch to
generate outputs from the litesdcard module for controlling
bidirectional buffers between the FPGA and SD card.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 		8 months ago
..
gen-src litesdcard: Name targets by vendor.frequency, not just vendor 8 months ago
generated litesdcard: Regenerate verilog code with buffer direction controls 8 months ago
fusesoc-add-files.py litesdcard: Name targets by vendor.frequency, not just vendor 8 months ago
litesdcard.core litesdcard: Use vendor not board type 3 years ago