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135 lines
2.2 KiB
ArmAsm
135 lines
2.2 KiB
ArmAsm
/* Copyright 2013-2014 IBM Corp.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define STACK_TOP 0x2000
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/* Load an immediate 64-bit value into a register */
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#define LOAD_IMM64(r, e) \
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lis r,(e)@highest; \
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ori r,r,(e)@higher; \
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rldicr r,r, 32, 31; \
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oris r,r, (e)@h; \
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ori r,r, (e)@l;
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.section ".head","ax"
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/*
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* Microwatt currently enters in LE mode at 0x0, so we don't need to
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* do any endian fix ups
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*/
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. = 0
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.global _start
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_start:
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b boot_entry
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.global boot_entry
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boot_entry:
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/* setup stack */
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LOAD_IMM64(%r1, STACK_TOP - 0x100)
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LOAD_IMM64(%r12, main)
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mtctr %r12
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bctrl
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attn // terminate on exit
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b .
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.globl read_sprn
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read_sprn:
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nop
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nop
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mr %r0,%r3
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mr %r3,%r4
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cmpdi %r0,0
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beq 0f
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cmpdi %r0,1
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beq 1f
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cmpdi %r0,4
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beq 4f
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cmpdi %r0,5
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beq 5f
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cmpdi %r0,6
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beq 6f
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mfspr %r3,179
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blr
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0: mfspr %r3,0
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blr
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1: mfspr %r3,1
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blr
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4: mfspr %r3,4
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blr
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5: mfspr %r3,5
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blr
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6: mfspr %r3,6
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blr
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.globl write_sprn
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write_sprn:
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nop
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nop
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mr %r0,%r3
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li %r3,0
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cmpdi %r0,0
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beq 0f
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cmpdi %r0,1
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beq 1f
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cmpdi %r0,4
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beq 4f
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cmpdi %r0,5
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beq 5f
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cmpdi %r0,6
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beq 6f
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mtspr 179,%r3
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blr
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0: mtspr 0,%r3
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blr
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1: mtspr 1,%r3
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blr
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4: mtspr 4,%r3
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blr
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5: mtspr 5,%r3
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blr
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6: mtspr 6,%r3
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blr
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#define EXCEPTION(nr) \
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.= nr ;\
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li %r3,nr ;\
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blr
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EXCEPTION(0x300)
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EXCEPTION(0x380)
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EXCEPTION(0x400)
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EXCEPTION(0x480)
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EXCEPTION(0x500)
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EXCEPTION(0x600)
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EXCEPTION(0x700)
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EXCEPTION(0x800)
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EXCEPTION(0x900)
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EXCEPTION(0x980)
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EXCEPTION(0xa00)
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EXCEPTION(0xb00)
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EXCEPTION(0xc00)
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EXCEPTION(0xd00)
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EXCEPTION(0xe00)
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EXCEPTION(0xe20)
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EXCEPTION(0xe40)
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EXCEPTION(0xe60)
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EXCEPTION(0xe80)
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EXCEPTION(0xf00)
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EXCEPTION(0xf20)
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EXCEPTION(0xf40)
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EXCEPTION(0xf60)
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EXCEPTION(0xf80)
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