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Jean-François Nguyen 7aaeff1122 pfv: add configurable memory alignment constraints. ... Before this commit, the `mem_aligned` parameter assumed a 64-bit data bus when set to True.		2 years ago
..
__init__.py	check.insn: use DUT parameters to configure the spec pfv.Interface.	2 years ago
addsub.py	insn: use records to define instruction encodings.	2 years ago
bcd.py	insn: use records to define instruction encodings.	2 years ago
branch.py	insn: use records to define instruction encodings.	2 years ago
byterev.py	insn: use records to define instruction encodings.	2 years ago
compare.py	insn.spec.compare: ignore upper 32-bits when pfv.gpr_width=32.	2 years ago
cr.py	insn: use records to define instruction encodings.	2 years ago
loadstore.py	pfv: add configurable memory alignment constraints.	2 years ago
logical.py	insn: use records to define instruction encodings.	2 years ago
msr.py	insn: use records to define instruction encodings.	2 years ago
muldiv.py	insn.spec.muldiv: do not treat OE=1 forms as separate operations.	2 years ago
rotate.py	insn: use records to define instruction encodings.	2 years ago
spr.py	insn: use records to define instruction encodings.	2 years ago
syscall.py	insn: use records to define instruction encodings.	2 years ago
trap.py	insn: use records to define instruction encodings.	2 years ago
utils.py	insn.spec: implement some interrupts (program,alignment,system call).	2 years ago