Add log2ceil and use it in bram code

We might want a non power of 2 amount of RAM in order to fit into an
FPGA, so create log2ceil and use it when calculating the number of
memory bits.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
jtag-port
Anton Blanchard 5 years ago committed by Anton Blanchard
parent b3dd31a978
commit 488c30fe91

@ -5,6 +5,7 @@ use ieee.numeric_std.all;
package utils is package utils is


function log2(i : natural) return integer; function log2(i : natural) return integer;
function log2ceil(i : natural) return integer;
function ispow2(i : integer) return boolean; function ispow2(i : integer) return boolean;


end utils; end utils;
@ -22,6 +23,17 @@ package body utils is
return ret; return ret;
end function; end function;


function log2ceil(i : natural) return integer is
variable tmp : integer := i;
variable ret : integer := 0;
begin
while tmp >= 1 loop
ret := ret + 1;
tmp := tmp / 2;
end loop;
return ret;
end function;

function ispow2(i : integer) return boolean is function ispow2(i : integer) return boolean is
begin begin
if to_integer(to_unsigned(i, 32) and to_unsigned(i - 1, 32)) = 0 then if to_integer(to_unsigned(i, 32) and to_unsigned(i - 1, 32)) = 0 then

@ -24,7 +24,7 @@ entity wishbone_bram_wrapper is
end entity wishbone_bram_wrapper; end entity wishbone_bram_wrapper;


architecture behaviour of wishbone_bram_wrapper is architecture behaviour of wishbone_bram_wrapper is
constant ram_addr_bits : integer := log2(MEMORY_SIZE) - 3; constant ram_addr_bits : integer := log2ceil(MEMORY_SIZE) - 3;


-- RAM interface -- RAM interface
signal ram_addr : std_logic_vector(ram_addr_bits - 1 downto 0); signal ram_addr : std_logic_vector(ram_addr_bits - 1 downto 0);

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