Add script for writing to flash on arty

You must have openocd 0.10.0 installed.

$ ./openocd/flash-arty ~/microwatt-fusesoc/build/microwatt_0/arty_a7-35-vivado/microwatt_0.bit
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
none separate
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
adapter speed: 25000 kHz
fpga_program
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Info : clock speed 25000 kHz
Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)
loaded file microwatt/openocd/bscan_spi_xc7a35t.bit to pld device 0 in 0s 136459us
Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
flash 'jtagspi' found at 0x00000000
auto erase enabled
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
Info : sector 0 took 241 ms
Info : sector 1 took 242 ms
Info : sector 2 took 241 ms
Info : sector 3 took 247 ms
Info : sector 4 took 253 ms
Info : sector 5 took 244 ms
Info : sector 6 took 246 ms
Info : sector 7 took 237 ms
Info : sector 8 took 258 ms
Info : sector 9 took 260 ms
Info : sector 10 took 262 ms
Info : sector 11 took 253 ms
Info : sector 12 took 256 ms
Info : sector 13 took 255 ms
wrote 917504 bytes from file microwatt-fusesoc/build/microwatt_0/arty_a7-35-vivado/microwatt_0.bit in 9.642746s (92.920 KiB/s)
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
read 907483 bytes from file microwatt-fusesoc/build/microwatt_0/arty_a7-35-vivado/microwatt_0.bit and flash bank 0 at offset 0x00000000 in 0.557387s (1589.944 KiB/s)
contents match

Signed-off-by: Joel Stanley <joel@jms.id.au>
jtag-port
Joel Stanley 5 years ago
parent 8857bd1f58
commit 60d2b8ac1e

@ -0,0 +1,38 @@
#!/usr/bin/python3

import argparse
import os
import subprocess
import sys

BASE = os.path.dirname(os.path.abspath(__file__))
CONFIG = os.path.join(BASE, "xilinx-xc7.cfg")

def flash(config, flash_proxy, address, data, set_qe=False):
script = "; ".join([
"init",
"jtagspi_init 0 {{{}}}".format(flash_proxy),
"jtagspi set_qe 0 1" if set_qe else "",
"jtagspi_program {{{}}} 0x{:x}".format(data, address),
"fpga_program",
"exit"
])
subprocess.call(["openocd", "-f", config, "-c", script])

parser = argparse.ArgumentParser()
parser.add_argument("file", help="file to write to flash")
parser.add_argument("-a", "--address", help="offset in flash", type=int, default=0)
parser.add_argument("-f", "--fpga", help="a35 or a100", default="a35")
args = parser.parse_args()

if args.fpga.lower() == "a35":
proxy = "bscan_spi_xc7a35t.bit"
elif args.fpga.lower() == "a100":
proxy = "bscan_spi_xc7a100t.bit"
else:
print("error: specify a35 or a100 when flashing")
sys.exit()

proxy = os.path.join(BASE, proxy)

flash(CONFIG, proxy, args.address, args.file)

@ -0,0 +1,14 @@
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none

source [find cpld/xilinx-xc7.cfg]
source [find cpld/jtagspi.cfg]
adapter_khz 25000

proc fpga_program {} {
global _CHIPNAME
xc7_program $_CHIPNAME.tap
}
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