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Merge pull request #66 from antonblanchard/reformat-4

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More reformatting
jtag-port
Anton Blanchard 5 years ago committed by GitHub
parent c5d327cebf 7e7010c304
commit 6571b13308
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3 changed files with 385 additions and 465 deletions
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158
crhelpers.vhdl
Unescape Escape View File

@ -5,130 +5,50 @@ library work;
use work.common.all; use work.common.all;


package crhelpers is package crhelpers is
function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer; function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer;
function num_to_fxm(num: integer) return std_ulogic_vector; function num_to_fxm(num: integer) return std_ulogic_vector;
--function from_crfile(cr: crfile) return std_ulogic_vector;
--function extract_one_crfield(cr: crfile; fxm: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
--function insert_multiple_crfields(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile;
--function insert_one_crfield(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile;
end package crhelpers; end package crhelpers;


package body crhelpers is package body crhelpers is


function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer is function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer is
begin begin
-- If multiple fields are set (undefined), match existing -- If multiple fields are set (undefined), match existing
-- hardware by returning the first one. -- hardware by returning the first one.
for i in 0 to 7 loop for i in 0 to 7 loop
-- Big endian bit numbering -- Big endian bit numbering
if fxm(7-i) = '1' then if fxm(7-i) = '1' then
return i; return i;
end if; end if;
end loop; end loop;


-- If no fields are set (undefined), also match existing -- If no fields are set (undefined), also match existing
-- hardware by returning cr7. -- hardware by returning cr7.
return 7; return 7;
end; end;


function num_to_fxm(num: integer) return std_ulogic_vector is function num_to_fxm(num: integer) return std_ulogic_vector is
begin begin
case num is case num is
when 0 => when 0 =>
return "10000000"; return "10000000";
when 1 => when 1 =>
return "01000000"; return "01000000";
when 2 => when 2 =>
return "00100000"; return "00100000";
when 3 => when 3 =>
return "00010000"; return "00010000";
when 4 => when 4 =>
return "00001000"; return "00001000";
when 5 => when 5 =>
return "00000100"; return "00000100";
when 6 => when 6 =>
return "00000010"; return "00000010";
when 7 => when 7 =>
return "00000001"; return "00000001";
when others => when others =>
return "00000000"; return "00000000";
end case; end case;
end; end;


-- function from_crfile(cr: crfile) return std_ulogic_vector is
-- variable combined_cr : std_ulogic_vector(31 downto 0) := (others => '0');
-- variable high, low: integer range 0 to 31 := 0;
-- begin
-- for i in 0 to cr'length-1 loop
-- low := 4*(7-i);
-- high := low+3;
-- combined_cr(high downto low) := cr(i);
-- end loop;
--
-- return combined_cr;
-- end function;
--
-- function extract_one_crfield(cr: crfile; fxm: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
-- variable combined_cr : std_ulogic_vector(63 downto 0) := (others => '0');
-- variable crnum: integer range 0 to 7 := 0;
-- begin
-- crnum := fxm_to_num(fxm);
--
-- -- Vivado doesn't support non constant vector slice
-- -- low := 4*(7-crnum);
-- -- high := low+3;
-- -- combined_cr(high downto low) := cr(crnum);
-- case_0: case crnum is
-- when 0 =>
-- combined_cr(31 downto 28) := cr(0);
-- when 1 =>
-- combined_cr(27 downto 24) := cr(1);
-- when 2 =>
-- combined_cr(23 downto 20) := cr(2);
-- when 3 =>
-- combined_cr(19 downto 16) := cr(3);
-- when 4 =>
-- combined_cr(15 downto 12) := cr(4);
-- when 5 =>
-- combined_cr(11 downto 8) := cr(5);
-- when 6 =>
-- combined_cr(7 downto 4) := cr(6);
-- when 7 =>
-- combined_cr(3 downto 0) := cr(7);
-- end case;
--
-- return combined_cr;
-- end;
--
-- function insert_multiple_crfields(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile is
-- variable cr : crfile;
-- variable combined_cr : std_ulogic_vector(63 downto 0) := (others => '0');
-- variable high, low: integer range 0 to 31 := 0;
-- begin
-- cr := cr_in;
--
-- for i in 0 to 7 loop
-- -- BE bit numbering
-- if fxm(7-i) = '1' then
-- low := 4*(7-i);
-- high := low+3;
-- cr(i) := rs(high downto low);
-- end if;
-- end loop;
--
-- return cr;
-- end;
--
-- function insert_one_crfield(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile is
-- variable cr : crfile;
-- variable crnum: integer range 0 to 7 := 0;
-- variable high, low: integer range 0 to 31 := 0;
-- begin
-- cr := cr_in;
-- crnum := fxm_to_num(fxm);
-- low := 4*(7-crnum);
-- high := low+3;
-- cr(crnum) := rs(high downto low);
-- return cr;
-- end;
end package body crhelpers; end package body crhelpers;

382
helpers.vhdl
Unescape Escape View File

@ -5,205 +5,205 @@ use ieee.numeric_std.all;
library work; library work;


package helpers is package helpers is
function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer; function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer;
function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer; function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer;


function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer; function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer;
function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer; function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer;


function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector; function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector; function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector;
function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector; function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector;


function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector; function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;


function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector; function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector;
function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector; function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector;


function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector; function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector;


function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector; function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector;


function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector; function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector;
end package helpers; end package helpers;


package body helpers is package body helpers is
function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer is function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer is
variable ret: integer; variable ret: integer;
begin begin
ret := 32; ret := 32;
for i in val'range loop for i in val'range loop
if val(i) = '1' then if val(i) = '1' then
ret := 31 - i; ret := 31 - i;
exit; exit;
end if; end if;
end loop; end loop;


return ret; return ret;
end; end;


function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer is function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer is
variable ret: integer; variable ret: integer;
begin begin
ret := 32; ret := 32;
for i in val'reverse_range loop for i in val'reverse_range loop
if val(i) = '1' then if val(i) = '1' then
ret := i; ret := i;
exit; exit;
end if; end if;
end loop; end loop;


return ret; return ret;
end; end;


function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer is function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer is
variable ret: integer; variable ret: integer;
begin begin
ret := 64; ret := 64;
for i in val'range loop for i in val'range loop
if val(i) = '1' then if val(i) = '1' then
ret := 63 - i; ret := 63 - i;
exit; exit;
end if; end if;
end loop; end loop;


return ret; return ret;
end; end;


function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer is function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer is
variable ret: integer; variable ret: integer;
begin begin
ret := 64; ret := 64;
for i in val'reverse_range loop for i in val'reverse_range loop
if val(i) = '1' then if val(i) = '1' then
ret := i; ret := i;
exit; exit;
end if; end if;
end loop; end loop;


return ret; return ret;
end; end;


function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
variable ret: unsigned(3 downto 0) := (others => '0'); variable ret: unsigned(3 downto 0) := (others => '0');
begin begin
for i in val'range loop for i in val'range loop
ret := ret + ("000" & val(i)); ret := ret + ("000" & val(i));
end loop; end loop;


return std_ulogic_vector(resize(ret, val'length)); return std_ulogic_vector(resize(ret, val'length));
end; end;


function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector is function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector is
variable ret: unsigned(5 downto 0) := (others => '0'); variable ret: unsigned(5 downto 0) := (others => '0');
begin begin
for i in val'range loop for i in val'range loop
ret := ret + ("00000" & val(i)); ret := ret + ("00000" & val(i));
end loop; end loop;


return std_ulogic_vector(resize(ret, val'length)); return std_ulogic_vector(resize(ret, val'length));
end; end;


function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector is function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector is
variable ret: unsigned(6 downto 0) := (others => '0'); variable ret: unsigned(6 downto 0) := (others => '0');
begin begin
for i in val'range loop for i in val'range loop
ret := ret + ("000000" & val(i)); ret := ret + ("000000" & val(i));
end loop; end loop;


return std_ulogic_vector(resize(ret, val'length)); return std_ulogic_vector(resize(ret, val'length));
end; end;


function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
variable ret: std_ulogic_vector(7 downto 0); variable ret: std_ulogic_vector(7 downto 0);
begin begin
if a = b then if a = b then
ret := x"ff"; ret := x"ff";
else else
ret := x"00"; ret := x"00";
end if; end if;


return ret; return ret;
end; end;


function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector is function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector is
variable ret: std_ulogic_vector(3 downto 0); variable ret: std_ulogic_vector(3 downto 0);
begin begin
if a < b then if a < b then
ret := "1000"; ret := "1000";
elsif a > b then elsif a > b then
ret := "0100"; ret := "0100";
else else
ret := "0010"; ret := "0010";
end if; end if;


return ret; return ret;
end; end;


function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector is function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector is
variable ret: std_ulogic_vector(3 downto 0); variable ret: std_ulogic_vector(3 downto 0);
begin begin
if a < b then if a < b then
ret := "1000"; ret := "1000";
elsif a > b then elsif a > b then
ret := "0100"; ret := "0100";
else else
ret := "0010"; ret := "0010";
end if; end if;


return ret; return ret;
end; end;


function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector is function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector is
begin begin
if to_integer(unsigned(reg)) = 0 then if to_integer(unsigned(reg)) = 0 then
return x"0000000000000000"; return x"0000000000000000";
else else
return ra; return ra;
end if; end if;
end; end;


function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector is function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector is
variable ret : std_ulogic_vector(63 downto 0) := (others => '0'); variable ret : std_ulogic_vector(63 downto 0) := (others => '0');
begin begin
-- Vivado doesn't support non constant vector slices, so we have to code -- Vivado doesn't support non constant vector slices, so we have to code
-- each of these. -- each of these.
case_0: case size is case_0: case size is
when 2 => when 2 =>
for_2 : for k in 0 to 1 loop for_2 : for k in 0 to 1 loop
ret(((8*k)+7) downto (8*k)) := val((8*(1-k)+7) downto (8*(1-k))); ret(((8*k)+7) downto (8*k)) := val((8*(1-k)+7) downto (8*(1-k)));
end loop; end loop;
when 4 => when 4 =>
for_4 : for k in 0 to 3 loop for_4 : for k in 0 to 3 loop
ret(((8*k)+7) downto (8*k)) := val((8*(3-k)+7) downto (8*(3-k))); ret(((8*k)+7) downto (8*k)) := val((8*(3-k)+7) downto (8*(3-k)));
end loop; end loop;
when 8 => when 8 =>
for_8 : for k in 0 to 7 loop for_8 : for k in 0 to 7 loop
ret(((8*k)+7) downto (8*k)) := val((8*(7-k)+7) downto (8*(7-k))); ret(((8*k)+7) downto (8*k)) := val((8*(7-k)+7) downto (8*(7-k)));
end loop; end loop;
when others => when others =>
report "bad byte reverse length " & integer'image(size) severity failure; report "bad byte reverse length " & integer'image(size) severity failure;
end case; end case;


return ret; return ret;
end; end;


function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector is function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector is
variable ret : signed(63 downto 0) := (others => '0'); variable ret : signed(63 downto 0) := (others => '0');
variable upper : integer := 0; variable upper : integer := 0;
begin begin
case_0: case size is case_0: case size is
when 2 => when 2 =>
ret := resize(signed(val(15 downto 0)), 64); ret := resize(signed(val(15 downto 0)), 64);
when 4 => when 4 =>
ret := resize(signed(val(31 downto 0)), 64); ret := resize(signed(val(31 downto 0)), 64);
when 8 => when 8 =>
ret := resize(signed(val(63 downto 0)), 64); ret := resize(signed(val(63 downto 0)), 64);
when others => when others =>
report "bad byte reverse length " & integer'image(size) severity failure; report "bad byte reverse length " & integer'image(size) severity failure;
end case; end case;


return std_ulogic_vector(ret); return std_ulogic_vector(ret);


end; end;
end package body helpers; end package body helpers;

310
insn_helpers.vhdl
Unescape Escape View File

@ -2,162 +2,162 @@ library ieee;
use ieee.std_logic_1164.all; use ieee.std_logic_1164.all;


package insn_helpers is package insn_helpers is
function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_l (insn_in : std_ulogic_vector) return std_ulogic; function insn_l (insn_in : std_ulogic_vector) return std_ulogic;
function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_lk (insn_in : std_ulogic_vector) return std_ulogic; function insn_lk (insn_in : std_ulogic_vector) return std_ulogic;
function insn_rc (insn_in : std_ulogic_vector) return std_ulogic; function insn_rc (insn_in : std_ulogic_vector) return std_ulogic;
function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector;
function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector; function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector;
end package insn_helpers; end package insn_helpers;


package body insn_helpers is package body insn_helpers is
function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(25 downto 21); return insn_in(25 downto 21);
end; end;


function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(25 downto 21); return insn_in(25 downto 21);
end; end;


function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(20 downto 16); return insn_in(20 downto 16);
end; end;


function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(15 downto 11); return insn_in(15 downto 11);
end; end;


function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(15 downto 0); return insn_in(15 downto 0);
end; end;


function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(15 downto 0); return insn_in(15 downto 0);
end; end;


function insn_l (insn_in : std_ulogic_vector) return std_ulogic is function insn_l (insn_in : std_ulogic_vector) return std_ulogic is
begin begin
return insn_in(21); return insn_in(21);
end; end;


function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(15 downto 11); return insn_in(15 downto 11);
end; end;


function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(10 downto 6); return insn_in(10 downto 6);
end; end;


function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(5 downto 1); return insn_in(5 downto 1);
end; end;


function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(25 downto 2); return insn_in(25 downto 2);
end; end;


function insn_lk (insn_in : std_ulogic_vector) return std_ulogic is function insn_lk (insn_in : std_ulogic_vector) return std_ulogic is
begin begin
return insn_in(0); return insn_in(0);
end; end;


function insn_rc (insn_in : std_ulogic_vector) return std_ulogic is function insn_rc (insn_in : std_ulogic_vector) return std_ulogic is
begin begin
return insn_in(0); return insn_in(0);
end; end;


function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(15 downto 2); return insn_in(15 downto 2);
end; end;


function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(25 downto 23); return insn_in(25 downto 23);
end; end;


function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(19 downto 12); return insn_in(19 downto 12);
end; end;


function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(25 downto 21); return insn_in(25 downto 21);
end; end;


function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(20 downto 16); return insn_in(20 downto 16);
end; end;


function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(12 downto 11); return insn_in(12 downto 11);
end; end;


function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(15 downto 0); return insn_in(15 downto 0);
end; end;


function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(15 downto 2); return insn_in(15 downto 2);
end; end;


function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(25 downto 21); return insn_in(25 downto 21);
end; end;


function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(10 downto 6); return insn_in(10 downto 6);
end; end;


function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(1) & insn_in(15 downto 11); return insn_in(1) & insn_in(15 downto 11);
end; end;


function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(5) & insn_in(10 downto 6); return insn_in(5) & insn_in(10 downto 6);
end; end;


function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector is function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector is
begin begin
return insn_in(5) & insn_in(10 downto 6); return insn_in(5) & insn_in(10 downto 6);
end; end;
end package body insn_helpers; end package body insn_helpers;

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