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@ -317,13 +317,14 @@ begin
@@ -317,13 +317,14 @@ begin
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slave_top_intercon: process(wb_master_out, wb_bram_out, wb_dram_out, wb_io_out, dram_at_0) |
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type slave_top_type is (SLAVE_TOP_BRAM, |
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SLAVE_TOP_DRAM, |
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SLAVE_TOP_IO); |
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SLAVE_TOP_IO, |
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SLAVE_TOP_INVALID); |
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variable slave_top : slave_top_type; |
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variable top_decode : std_ulogic_vector(3 downto 0); |
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begin |
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-- Top-level address decoder |
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top_decode := wb_master_out.adr(31 downto 29) & dram_at_0; |
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slave_top := SLAVE_TOP_BRAM; |
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slave_top := SLAVE_TOP_INVALID; |
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if std_match(top_decode, "0000") then |
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slave_top := SLAVE_TOP_BRAM; |
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elsif std_match(top_decode, "0001") then |
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@ -344,6 +345,9 @@ begin
@@ -344,6 +345,9 @@ begin
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wb_io_in <= wb_master_out; |
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wb_io_in.cyc <= '0'; |
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case slave_top is |
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when SLAVE_TOP_INVALID => |
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-- We should terminate here |
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wb_master_in <= wishbone_slave_out_init; |
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when SLAVE_TOP_BRAM => |
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wb_bram_in.cyc <= wb_master_out.cyc; |
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wb_master_in <= wb_bram_out; |
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@ -388,6 +392,7 @@ begin
@@ -388,6 +392,7 @@ begin
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wb_io_out.stall <= '0'; |
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wb_sio_out.cyc <= '0'; |
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wb_sio_out.stb <= '0'; |
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wb_sio_out.adr <= (others => '0'); |
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has_top := false; |
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has_bot := false; |
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else |
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