Initialize PID register

If the PID register is read before it is written we'll consume
X state data.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
cache-tlb-parameters-2
Anton Blanchard 4 years ago committed by Anton Blanchard
parent 39c826aa46
commit 740f013284

@ -88,6 +88,7 @@ begin
r.pt0_valid <= '0';
r.pt3_valid <= '0';
r.prtbl <= (others => '0');
r.pid <= (others => '0');
else
if rin.valid = '1' then
report "MMU got tlb miss for " & to_hstring(rin.addr);

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