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Merge pull request #211 from shenki/spi-constraint

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spi: Fix dat_i_l constraints
jtag-port
Michael Neuling 4 years ago committed by GitHub
parent 695e081c35 60e5f7b958
commit 7566f04fe3
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1 changed files with 1 additions and 1 deletions
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fpga/arty_a7.xdc
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@ -39,7 +39,7 @@ set_property -dict { PACKAGE_PIN M14 IOSTANDARD LVCMOS33 } [get_ports { spi_flas


# Put registers into IOBs to improve timing # Put registers into IOBs to improve timing
set_property IOB true [get_cells -hierarchical -filter {NAME =~*/spi_rxtx/*sck_1*}] set_property IOB true [get_cells -hierarchical -filter {NAME =~*/spi_rxtx/*sck_1*}]
set_property IOB true [get_cells -hierarchical -filter {NAME =~*/spi_rxtx/dat_i_l*}] set_property IOB true [get_cells -hierarchical -filter {NAME =~*/spi_rxtx/input_delay_1.dat_i_l*}]




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