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@ -232,10 +232,10 @@ begin
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if rst = '1' then
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if rst = '1' then
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wb_out.ack <= '0';
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wb_out.ack <= '0';
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wb_out.stall <= '0';
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wb_out.stall <= '0';
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wb_stash.cyc <= '0';
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wb_stash.cyc <= '0';
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wb_stash.stb <= '0';
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wb_stash.stb <= '0';
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wb_stash.sel <= (others => '0');
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wb_stash.sel <= (others => '0');
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wb_stash.we <= '0';
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wb_stash.we <= '0';
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else
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else
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-- Latch wb responses as well for 1 cycle. Stall is updated
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-- Latch wb responses as well for 1 cycle. Stall is updated
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-- below
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-- below
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@ -348,17 +348,17 @@ begin
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auto_sync: process(clk)
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auto_sync: process(clk)
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begin
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begin
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if rising_edge(clk) then
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if rising_edge(clk) then
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if rst = '1' then
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if rst = '1' then
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auto_last_addr <= (others => '0');
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auto_last_addr <= (others => '0');
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auto_state <= AUTO_BOOT;
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auto_state <= AUTO_BOOT;
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else
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else
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auto_state <= auto_next;
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auto_state <= auto_next;
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auto_cnt <= auto_cnt_next;
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auto_cnt <= auto_cnt_next;
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auto_data <= auto_data_next;
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auto_data <= auto_data_next;
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if auto_latch_adr = '1' then
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if auto_latch_adr = '1' then
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auto_last_addr <= auto_lad_next;
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auto_last_addr <= auto_lad_next;
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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