Added synthesis target

The synth target can be used to analyze the core after synthesis
without running P&R. Currently, the only edalize backends that
support synthesis without P&R are vivado and icestorm, and icestorm
needs yosys built with verific support to parse vhdl.

To run synthesis only for a part, run

fusesoc run --target=synth --tool=vivado microwatt --part=<part>

where part is a valid Xilinx part such as xc7a100tcsg324-1
nia-debug
Olof Kindgren 5 years ago
parent 250d09ed2d
commit b9bf19f912

@ -66,6 +66,12 @@ targets:
vivado: {part : xc7a200tsbg484-1} vivado: {part : xc7a200tsbg484-1}
toplevel : toplevel toplevel : toplevel


synth:
filesets: [core]
tools:
vivado: {pnr : none}
toplevel: core

parameters: parameters:
memory_size: memory_size:
datatype : int datatype : int

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