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@ -29,29 +29,29 @@ void print_number(unsigned int i) // only for i = 0-999
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}
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}
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#ifdef DEBUG
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#ifdef DEBUG
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#define DEBUG_STR "\r\nDEBUG: "
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#define DEBUG_STR "\nDEBUG: "
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void debug_print(int i)
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void debug_print(int i)
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{
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{
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putstr(DEBUG_STR, strlen(DEBUG_STR));
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puts(DEBUG_STR);
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print_number(i);
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print_number(i);
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putstr("\r\n", 2);
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puts("\n");
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}
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}
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#define debug_putstr(a, b) putstr(a,b)
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#define debug_puts(a) puts(a)
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#else
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#else
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#define debug_putstr(a, b)
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#define debug_puts(a)
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#define debug_print(i)
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#define debug_print(i)
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#endif
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#endif
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#define ASSERT_FAIL "() ASSERT_FAILURE!\r\n "
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#define ASSERT_FAIL "() ASSERT_FAILURE!\n "
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#define assert(cond) \
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#define assert(cond) \
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if (!(cond)) { \
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if (!(cond)) { \
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putstr(__FILE__, strlen(__FILE__)); \
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puts(__FILE__); \
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putstr(":", 1); \
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putchar(':'); \
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print_number(__LINE__); \
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print_number(__LINE__); \
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putstr(":", 1); \
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putchar(':'); \
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putstr(__FUNCTION__, strlen(__FUNCTION__));\
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puts(__FUNCTION__);\
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putstr(ASSERT_FAIL, strlen(ASSERT_FAIL)); \
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puts(ASSERT_FAIL); \
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__asm__ ("attn"); \
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__asm__ ("attn"); \
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}
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}
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@ -62,17 +62,17 @@ volatile uint64_t isrs_run;
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#define ISR_UART 0x0000000000000002
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#define ISR_UART 0x0000000000000002
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#define ISR_SPURIOUS 0x0000000000000004
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#define ISR_SPURIOUS 0x0000000000000004
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#define IPI "IPI\r\n"
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#define IPI "IPI\n"
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void ipi_isr(void) {
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void ipi_isr(void) {
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debug_putstr(IPI, strlen(IPI));
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debug_puts(IPI);
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isrs_run |= ISR_IPI;
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isrs_run |= ISR_IPI;
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}
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}
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#define UART "UART\r\n"
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#define UART "UART\n"
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void uart_isr(void) {
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void uart_isr(void) {
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debug_putstr(UART, strlen(UART));
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debug_puts(UART);
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potato_uart_irq_dis(); // disable interrupt to ack it
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potato_uart_irq_dis(); // disable interrupt to ack it
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@ -80,9 +80,9 @@ void uart_isr(void) {
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}
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}
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// The hardware doesn't support this but it's part of XICS so add it.
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// The hardware doesn't support this but it's part of XICS so add it.
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#define SPURIOUS "SPURIOUS\r\n"
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#define SPURIOUS "SPURIOUS\n"
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void spurious_isr(void) {
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void spurious_isr(void) {
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debug_putstr(SPURIOUS, strlen(SPURIOUS));
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debug_puts(SPURIOUS);
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isrs_run |= ISR_SPURIOUS;
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isrs_run |= ISR_SPURIOUS;
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}
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}
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@ -113,9 +113,9 @@ void isr(void)
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xirr = xics_read32(XICS_XIRR); // read hardware irq source
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xirr = xics_read32(XICS_XIRR); // read hardware irq source
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#ifdef DEBUG
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#ifdef DEBUG
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putstr(ISR, strlen(ISR));
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puts(ISR);
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print_number(xirr & 0xff);
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print_number(xirr & 0xff);
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putstr("\r\n", 2);
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puts("\n");
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#endif
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#endif
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op = isr_table;
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op = isr_table;
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@ -221,8 +221,8 @@ int xics_test_2(void)
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}
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}
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#define TEST "Test "
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#define TEST "Test "
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#define PASS "PASS\r\n"
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#define PASS "PASS\n"
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#define FAIL "FAIL\r\n"
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#define FAIL "FAIL\n"
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int (*tests[])(void) = {
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int (*tests[])(void) = {
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xics_test_0,
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xics_test_0,
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@ -246,14 +246,14 @@ int main(void)
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if (!t)
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if (!t)
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break;
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break;
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putstr(TEST, strlen(TEST));
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puts(TEST);
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print_number(i);
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print_number(i);
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putstr(": ", 1);
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putchar(':');
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if (t() != 0) {
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if (t() != 0) {
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fail = 1;
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fail = 1;
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putstr(FAIL, strlen(FAIL));
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puts(FAIL);
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} else
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} else
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putstr(PASS, strlen(PASS));
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puts(PASS);
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i++;
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i++;
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}
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}
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