xics: Add missing fusesoc core file

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
jtag-port
Benjamin Herrenschmidt 5 years ago
parent 1ba29a407a
commit f124dc4a40

@ -45,6 +45,7 @@ filesets:
- wishbone_debug_master.vhdl - wishbone_debug_master.vhdl
- wishbone_bram_wrapper.vhdl - wishbone_bram_wrapper.vhdl
- soc.vhdl - soc.vhdl
- xics.vhdl
file_type : vhdlSource-2008 file_type : vhdlSource-2008


fpga: fpga:

Loading…
Cancel
Save