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• 01e6b8f583
  Merge pull request #2 from olofk/fusesoc_nexys_a7 Anton Blanchard 2019-08-24 05:25:48 +1000
• b9bf19f912 Added synthesis target Olof Kindgren 2019-08-23 14:20:20 +0200
• 250d09ed2d Add Nexys Video support Olof Kindgren 2019-08-23 14:09:06 +0200
• 5e56b14125 Add FuseSoC core description file with Nexys A7 support Olof Kindgren 2019-08-23 13:32:05 +0200
• abca85b034 Add constraint file for Nexys A7 Olof Kindgren 2019-08-23 13:19:11 +0200
• e8ad9bed10 Expose ram init file and memory size through toplevel Olof Kindgren 2019-08-23 13:18:39 +0200
• b5bccc4c13 Add dummy clock generator Olof Kindgren 2019-08-23 13:17:35 +0200
• 37fe8b954c Add a few more FPGA related files Anton Blanchard 2019-08-23 16:23:53 +1000
• 5a29cb4699 Initial import of microwatt Anton Blanchard 2019-08-22 16:46:13 +1000