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5c40143754
To produce verilog suitable for caravel: make DOCKER=1 FPGA_TARGET=caravel microwatt_asic.v ./caravel/process-microwatt-verilog.sh Signed-off-by: Anton Blanchard <anton@linux.ibm.com> |
3 years ago | |
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insert_power.py | 3 years ago | |
process-microwatt-verilog.sh | 3 years ago |