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s/insruction/instruction/g

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Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
pull/69/head
Paul Clarke 5 years ago committed by Paul Clarke
parent 914a28f0cd
commit 5ab9ef6cce
1 changed files with 7 additions and 7 deletions
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Intrinsics_Reference/ch_vec_reference.xml
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@ -8172,7 +8172,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<para><emphasis role="bold">Endian considerations:</emphasis> <para><emphasis role="bold">Endian considerations:</emphasis>
All element and bit numberings of the AES cipher operation use All element and bit numberings of the AES cipher operation use
big-endian (i.e., left-to-right) order, reflecting the underlying big-endian (i.e., left-to-right) order, reflecting the underlying
hardware insruction. Unlike most of the vector intrinsics in this hardware instruction. Unlike most of the vector intrinsics in this
chapter, <code>vec_cipher_be</code> does not follow the bi-endian chapter, <code>vec_cipher_be</code> does not follow the bi-endian
programming model. programming model.
</para> </para>
@ -8257,7 +8257,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<para><emphasis role="bold">Endian considerations:</emphasis> <para><emphasis role="bold">Endian considerations:</emphasis>
All element and bit numberings of the AES cipher-last operation use All element and bit numberings of the AES cipher-last operation use
big-endian (i.e., left-to-right) order, reflecting the underlying big-endian (i.e., left-to-right) order, reflecting the underlying
hardware insruction. Unlike most of the vector intrinsics in this hardware instruction. Unlike most of the vector intrinsics in this
chapter, <code>vec_cipherlast_be</code> does not follow the bi-endian chapter, <code>vec_cipherlast_be</code> does not follow the bi-endian
programming model. programming model.
</para> </para>
@ -21529,7 +21529,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<para><emphasis role="bold">Endian considerations:</emphasis> <para><emphasis role="bold">Endian considerations:</emphasis>
All element and bit numberings of the AES inverse cipher operation use All element and bit numberings of the AES inverse cipher operation use
big-endian (i.e., left-to-right) order, reflecting the underlying big-endian (i.e., left-to-right) order, reflecting the underlying
hardware insruction. Unlike most of the vector intrinsics in this hardware instruction. Unlike most of the vector intrinsics in this
chapter, <code>vec_ncipher_be</code> does not follow the bi-endian chapter, <code>vec_ncipher_be</code> does not follow the bi-endian
programming model. programming model.
</para> </para>
@ -21614,7 +21614,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<para><emphasis role="bold">Endian considerations:</emphasis> <para><emphasis role="bold">Endian considerations:</emphasis>
All element and bit numberings of the AES inverse cipher-last operation All element and bit numberings of the AES inverse cipher-last operation
use big-endian (i.e., left-to-right) order, reflecting the underlying use big-endian (i.e., left-to-right) order, reflecting the underlying
hardware insruction. Unlike most of the vector intrinsics in this hardware instruction. Unlike most of the vector intrinsics in this
chapter, <code>vec_ncipherlast_be</code> does not follow the bi-endian chapter, <code>vec_ncipherlast_be</code> does not follow the bi-endian
programming model. programming model.
</para> </para>
@ -25331,7 +25331,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<para><emphasis role="bold">Endian considerations:</emphasis> <para><emphasis role="bold">Endian considerations:</emphasis>
All element numberings in the above description denote big-endian All element numberings in the above description denote big-endian
(i.e., left-to-right) order, reflecting the underlying hardware (i.e., left-to-right) order, reflecting the underlying hardware
insruction. Unlike most of the vector intrinsics in this chapter, instruction. Unlike most of the vector intrinsics in this chapter,
<code>vec_pmsum_be</code> does not follow the bi-endian <code>vec_pmsum_be</code> does not follow the bi-endian
programming model. programming model.
</para> </para>
@ -27458,7 +27458,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<para><emphasis role="bold">Endian considerations:</emphasis> <para><emphasis role="bold">Endian considerations:</emphasis>
All element numberings of the SubBytes operation use All element numberings of the SubBytes operation use
big-endian (i.e., left-to-right) order, reflecting the underlying big-endian (i.e., left-to-right) order, reflecting the underlying
hardware insruction. Unlike most of the vector intrinsics in this hardware instruction. Unlike most of the vector intrinsics in this
chapter, <code>vec_sbox_be</code> does not follow the bi-endian chapter, <code>vec_sbox_be</code> does not follow the bi-endian
programming model. programming model.
</para> </para>
@ -28214,7 +28214,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<para><emphasis role="bold">Endian considerations:</emphasis> <para><emphasis role="bold">Endian considerations:</emphasis>
All element numberings in the above description denote big-endian All element numberings in the above description denote big-endian
(i.e., left-to-right) order, reflecting the underlying hardware (i.e., left-to-right) order, reflecting the underlying hardware
insruction. Unlike most of the vector intrinsics in this chapter, instruction. Unlike most of the vector intrinsics in this chapter,
<code>vec_pmsum_be</code> does not follow the bi-endian <code>vec_pmsum_be</code> does not follow the bi-endian
programming model. programming model.
</para> </para>

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