The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue

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a2o/dev/verilog/unisims

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openpowerwtf 200551679c syntax		10 months ago
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RAM64X1D.v	add dev	11 months ago
RAMB16_S9_S9.v	add dev	11 months ago
RAMB16_S18_S18.v	add dev	11 months ago
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bram_model.v	syntax	10 months ago