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ECPIX-5: Add litesdcard support

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Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
pull/428/head
Paul Mackerras 9 months ago
parent c1f23e7417
commit 4199f896a1
5 changed files with 4855 additions and 4 deletions
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1
Makefile
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@ -227,6 +227,7 @@ OPENOCD_JTAG_CONFIG=openocd/ecpix-5.cfg
OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
toplevel=fpga/top-ecpix5.vhdl toplevel=fpga/top-ecpix5.vhdl
litedram_target=ecpix-5 litedram_target=ecpix-5
soc_extra_v += litesdcard/generated/lattice.50e6/litesdcard_core.v
dmi_dtm=dmi_dtm_ecp5.vhdl dmi_dtm=dmi_dtm_ecp5.vhdl
endif endif



25
constraints/ecpix-5.lpf
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@ -58,6 +58,31 @@ IOBUF PORT "spi_flash_wp_n" IO_TYPE=LVCMOS33;
LOCATE COMP "spi_flash_hold_n" SITE "AE1"; LOCATE COMP "spi_flash_hold_n" SITE "AE1";
IOBUF PORT "spi_flash_hold_n" IO_TYPE=LVCMOS33; IOBUF PORT "spi_flash_hold_n" IO_TYPE=LVCMOS33;


// SD card slot and level translator
LOCATE COMP "sdcard_data[0]" SITE "N26";
LOCATE COMP "sdcard_data[1]" SITE "N25";
LOCATE COMP "sdcard_data[2]" SITE "N23";
LOCATE COMP "sdcard_data[3]" SITE "N21";
LOCATE COMP "sdcard_cmd" SITE "M24";
LOCATE COMP "sdcard_clk" SITE "P24";
LOCATE COMP "sdcard_cd" SITE "L22";
LOCATE COMP "sdcard_cmd_dir" SITE "M23";
LOCATE COMP "sdcard_dat0_dir" SITE "N24";
LOCATE COMP "sdcard_dat13_dir" SITE "P26";
LOCATE COMP "sdcard_vsel" SITE "L24";

IOBUF PORT "sdcard_data[0]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_data[1]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_data[2]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_data[3]" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_cmd" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_clk" IO_TYPE=LVCMOS33 SLEWRATE=FAST;
IOBUF PORT "sdcard_cd" IO_TYPE=LVCMOS33;
IOBUF PORT "sdcard_cmd_dir" IO_TYPE=LVCMOS33 SLEWRATE=FAST PULLMODE=UP;
IOBUF PORT "sdcard_dat0_dir" IO_TYPE=LVCMOS33 SLEWRATE=FAST;
IOBUF PORT "sdcard_dat13_dir" IO_TYPE=LVCMOS33 SLEWRATE=FAST;
IOBUF PORT "sdcard_vsel" IO_TYPE=LVCMOS33 PULLMODE=DOWN;

// DDR3 SDRAM // DDR3 SDRAM
LOCATE COMP "ddram_a[0]" SITE "T5"; LOCATE COMP "ddram_a[0]" SITE "T5";
LOCATE COMP "ddram_a[1]" SITE "M3"; LOCATE COMP "ddram_a[1]" SITE "M3";

152
fpga/top-ecpix5.vhdl
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@ -23,7 +23,7 @@ entity toplevel is
LOG_LENGTH : natural := 0; LOG_LENGTH : natural := 0;
UART_IS_16550 : boolean := true; UART_IS_16550 : boolean := true;
HAS_UART1 : boolean := false; HAS_UART1 : boolean := false;
USE_LITESDCARD : boolean := false; USE_LITESDCARD : boolean := true;
ICACHE_NUM_LINES : natural := 64; ICACHE_NUM_LINES : natural := 64;
NGPIO : natural := 0 NGPIO : natural := 0
); );
@ -57,6 +57,16 @@ entity toplevel is
spi_flash_wp_n : inout std_ulogic; spi_flash_wp_n : inout std_ulogic;
spi_flash_hold_n : inout std_ulogic; spi_flash_hold_n : inout std_ulogic;


-- SD card wires
sdcard_data : inout std_ulogic_vector(3 downto 0);
sdcard_cmd : inout std_ulogic;
sdcard_clk : out std_ulogic;
sdcard_cd : in std_ulogic;
sdcard_cmd_dir : out std_ulogic;
sdcard_dat0_dir : out std_ulogic;
sdcard_dat13_dir : out std_ulogic;
sdcard_vsel : out std_ulogic;

-- PMOD ports 0 - 7 -- PMOD ports 0 - 7
pmod0_0 : inout std_ulogic; pmod0_0 : inout std_ulogic;
pmod0_1 : inout std_ulogic; pmod0_1 : inout std_ulogic;
@ -156,6 +166,7 @@ architecture behaviour of toplevel is
signal wb_ext_io_out : wb_io_slave_out; signal wb_ext_io_out : wb_io_slave_out;
signal wb_ext_is_dram_csr : std_ulogic; signal wb_ext_is_dram_csr : std_ulogic;
signal wb_ext_is_dram_init : std_ulogic; signal wb_ext_is_dram_init : std_ulogic;
signal wb_ext_is_sdcard : std_ulogic;


-- DRAM main data wishbone connection -- DRAM main data wishbone connection
signal wb_dram_in : wishbone_master_out; signal wb_dram_in : wishbone_master_out;
@ -164,6 +175,16 @@ architecture behaviour of toplevel is
-- DRAM control wishbone connection -- DRAM control wishbone connection
signal wb_dram_ctrl_out : wb_io_slave_out := wb_io_slave_out_init; signal wb_dram_ctrl_out : wb_io_slave_out := wb_io_slave_out_init;


-- LiteSDCard connection
signal ext_irq_sdcard : std_ulogic := '0';
signal wb_sdcard_out : wb_io_slave_out := wb_io_slave_out_init;
signal wb_sddma_out : wb_io_master_out := wb_io_master_out_init;
signal wb_sddma_in : wb_io_slave_out;
signal wb_sddma_nr : wb_io_master_out;
signal wb_sddma_ir : wb_io_slave_out;
-- for conversion from non-pipelined wishbone to pipelined
signal wb_sddma_stb_sent : std_ulogic;

-- SPI flash -- SPI flash
signal spi_sck : std_ulogic; signal spi_sck : std_ulogic;
signal spi_sck_ts : std_ulogic; signal spi_sck_ts : std_ulogic;
@ -245,6 +266,9 @@ begin
spi_flash_sdat_oe => spi_sdat_oe, spi_flash_sdat_oe => spi_sdat_oe,
spi_flash_sdat_i => spi_sdat_i, spi_flash_sdat_i => spi_sdat_i,


-- External interrupts
ext_irq_sdcard => ext_irq_sdcard,

-- DRAM wishbone -- DRAM wishbone
wb_dram_in => wb_dram_in, wb_dram_in => wb_dram_in,
wb_dram_out => wb_dram_out, wb_dram_out => wb_dram_out,
@ -253,7 +277,12 @@ begin
wb_ext_io_in => wb_ext_io_in, wb_ext_io_in => wb_ext_io_in,
wb_ext_io_out => wb_ext_io_out, wb_ext_io_out => wb_ext_io_out,
wb_ext_is_dram_csr => wb_ext_is_dram_csr, wb_ext_is_dram_csr => wb_ext_is_dram_csr,
wb_ext_is_dram_init => wb_ext_is_dram_init wb_ext_is_dram_init => wb_ext_is_dram_init,
wb_ext_is_sdcard => wb_ext_is_sdcard,

-- DMA wishbone
wishbone_dma_in => wb_sddma_in,
wishbone_dma_out => wb_sddma_out
); );


-- SPI Flash -- SPI Flash
@ -391,8 +420,125 @@ begin
led8_g_n <= not (dram_init_done and not dram_init_error); led8_g_n <= not (dram_init_done and not dram_init_error);
end generate; end generate;


-- SD card
-- The ECPIX-5 has a buffer/level translator chip in order to be able to
-- support 1.8V signalling to the SD card as well as 3V signalling.
-- Litesdcard doesn't currently support voltage selection, or the higher
-- data transfer rates that require the lower voltage.
has_sdcard : if USE_LITESDCARD generate
component litesdcard_core port (
clk : in std_ulogic;
rst : in std_ulogic;
irq : out std_ulogic;
-- wishbone for accessing control registers
wb_ctrl_adr : in std_ulogic_vector(29 downto 0);
wb_ctrl_dat_w : in std_ulogic_vector(31 downto 0);
wb_ctrl_dat_r : out std_ulogic_vector(31 downto 0);
wb_ctrl_sel : in std_ulogic_vector(3 downto 0);
wb_ctrl_cyc : in std_ulogic;
wb_ctrl_stb : in std_ulogic;
wb_ctrl_ack : out std_ulogic;
wb_ctrl_we : in std_ulogic;
wb_ctrl_cti : in std_ulogic_vector(2 downto 0);
wb_ctrl_bte : in std_ulogic_vector(1 downto 0);
wb_ctrl_err : out std_ulogic;
-- wishbone for SD card core to use for DMA
wb_dma_adr : out std_ulogic_vector(29 downto 0);
wb_dma_dat_w : out std_ulogic_vector(31 downto 0);
wb_dma_dat_r : in std_ulogic_vector(31 downto 0);
wb_dma_sel : out std_ulogic_vector(3 downto 0);
wb_dma_cyc : out std_ulogic;
wb_dma_stb : out std_ulogic;
wb_dma_ack : in std_ulogic;
wb_dma_we : out std_ulogic;
wb_dma_cti : out std_ulogic_vector(2 downto 0);
wb_dma_bte : out std_ulogic_vector(1 downto 0);
wb_dma_err : in std_ulogic;
-- connections to SD card
sdcard_data : inout std_ulogic_vector(3 downto 0);
sdcard_cmd : inout std_ulogic;
sdcard_clk : out std_ulogic;
sdcard_cd : in std_ulogic;
sdcard_cmd_dir : out std_ulogic;
sdcard_dat0_dir : out std_ulogic;
sdcard_dat13_dir : out std_ulogic
);
end component;

signal wb_sdcard_cyc : std_ulogic;
signal wb_sdcard_adr : std_ulogic_vector(29 downto 0);

begin
litesdcard : litesdcard_core
port map (
clk => system_clk,
rst => soc_rst,
irq => ext_irq_sdcard,
wb_ctrl_adr => wb_sdcard_adr,
wb_ctrl_dat_w => wb_ext_io_in.dat,
wb_ctrl_dat_r => wb_sdcard_out.dat,
wb_ctrl_sel => wb_ext_io_in.sel,
wb_ctrl_cyc => wb_sdcard_cyc,
wb_ctrl_stb => wb_ext_io_in.stb,
wb_ctrl_ack => wb_sdcard_out.ack,
wb_ctrl_we => wb_ext_io_in.we,
wb_ctrl_cti => "000",
wb_ctrl_bte => "00",
wb_ctrl_err => open,
wb_dma_adr => wb_sddma_nr.adr,
wb_dma_dat_w => wb_sddma_nr.dat,
wb_dma_dat_r => wb_sddma_ir.dat,
wb_dma_sel => wb_sddma_nr.sel,
wb_dma_cyc => wb_sddma_nr.cyc,
wb_dma_stb => wb_sddma_nr.stb,
wb_dma_ack => wb_sddma_ir.ack,
wb_dma_we => wb_sddma_nr.we,
wb_dma_cti => open,
wb_dma_bte => open,
wb_dma_err => '0',
sdcard_data => sdcard_data,
sdcard_cmd => sdcard_cmd,
sdcard_clk => sdcard_clk,
sdcard_cd => sdcard_cd,
sdcard_cmd_dir => sdcard_cmd_dir,
sdcard_dat0_dir => sdcard_dat0_dir,
sdcard_dat13_dir => sdcard_dat13_dir
);

-- Select 3V signalling
sdcard_vsel <= '0';

-- Gate cyc with chip select from SoC
wb_sdcard_cyc <= wb_ext_io_in.cyc and wb_ext_is_sdcard;

wb_sdcard_adr <= x"0000" & wb_ext_io_in.adr(13 downto 0);

wb_sdcard_out.stall <= not wb_sdcard_out.ack;

-- Convert non-pipelined DMA wishbone to pipelined by suppressing
-- non-acknowledged strobes
process(system_clk)
begin
if rising_edge(system_clk) then
wb_sddma_out <= wb_sddma_nr;
if wb_sddma_stb_sent = '1' or
(wb_sddma_out.stb = '1' and wb_sddma_in.stall = '0') then
wb_sddma_out.stb <= '0';
end if;
if wb_sddma_nr.cyc = '0' or wb_sddma_ir.ack = '1' then
wb_sddma_stb_sent <= '0';
elsif wb_sddma_in.stall = '0' then
wb_sddma_stb_sent <= wb_sddma_nr.stb;
end if;
wb_sddma_ir <= wb_sddma_in;
end if;
end process;

end generate;

-- Mux WB response on the IO bus -- Mux WB response on the IO bus
wb_ext_io_out <= wb_dram_ctrl_out; wb_ext_io_out <= wb_sdcard_out when wb_ext_is_sdcard = '1' else
wb_dram_ctrl_out;


led5_r_n <= '1'; led5_r_n <= '1';
led5_g_n <= '1'; led5_g_n <= '1';

2
litesdcard/gen-src/generate.sh
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@ -1,7 +1,7 @@
#!/bin/bash #!/bin/bash


# vendor:sysclk # vendor:sysclk
VENDORS="xilinx:100e6 lattice:48e6" VENDORS="xilinx:100e6 lattice:48e6 lattice:50e6"


ME=$(realpath $0) ME=$(realpath $0)
echo ME=$ME echo ME=$ME

4679
litesdcard/generated/lattice.50e6/litesdcard_core.v
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