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microwatt/litedram/extras
Matt Johnston 4bd45af739 Move alt_reset to syscon
Instead of connecting core_alt_reset to litedram init_done, it moves to
a syscon register bit. This simplifies top- files and future soc_reset
handling. sdram main.c can unset the alt_reset bit after sdram init.

Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
1 year ago
..
fusesoc-add-files.py litedram: Remove old "VexRiscV" based initializations 4 years ago
litedram-wrapper-l2.vhdl Move alt_reset to syscon 1 year ago
sim_dram_verilate.mk litedram: Add simulation support 4 years ago
sim_litedram.vhdl Extend LiteDRAM VHDL wrapper to allow more than one clock line 2 years ago
sim_litedram_c.cpp Fix build of core_dram_tb and dram_tb and fix tracing 2 years ago
wave.gtkw litedram: Add an L2 cache with store queue 4 years ago
wave.opt litedram: Add an L2 cache with store queue 4 years ago
wave_tb.gtkw litedram: l2: Latency improvements 4 years ago