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Paul Mackerras
16c3eda1b1
This frees up LEDs 4 and 5 by combining their status functions into LED 0, which is now black when the system is in reset and yellow when the system clock is not locked. On configuations without litedram, LED 0 now shows green rather than magenta. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> |
3 months ago | |
|---|---|---|
| .. | ||
| LICENSE | 7 years ago | |
| acorn-cle-215.xdc | 6 years ago | |
| antmicro_artix_dc_scm.xdc | 4 years ago | |
| arty_a7.xdc | 3 months ago | |
| clk_gen_bypass.vhd | 7 years ago | |
| clk_gen_ecp5.vhd | 5 years ago | |
| clk_gen_mcmm.vhd | 5 years ago | |
| clk_gen_plle2.vhd | 5 years ago | |
| cmod_a7-35.xdc | 5 years ago | |
| firmware.hex | 7 years ago | |
| fpga-random.vhdl | 6 years ago | |
| fpga-random.xdc | 6 years ago | |
| genesys2.xdc | 5 years ago | |
| hello_world.hex | 6 years ago | |
| main_bram.vhdl | 5 years ago | |
| nexys-video.xdc | 5 years ago | |
| nexys_a7.xdc | 5 years ago | |
| pp_fifo.vhd | 6 years ago | |
| pp_soc_uart.vhd | 6 years ago | |
| pp_utilities.vhd | 7 years ago | |
| soc_reset.vhdl | 6 years ago | |
| soc_reset_tb.vhdl | 6 years ago | |
| top-acorn-cle-215.vhdl | 11 months ago | |
| top-antmicro-artix-dc-scm.vhdl | 4 years ago | |
| top-arty.vhdl | 3 months ago | |
| top-ecpix5.vhdl | 2 years ago | |
| top-generic.vhdl | 4 years ago | |
| top-genesys2.vhdl | 9 months ago | |
| top-nexys-video.vhdl | 2 years ago | |
| top-orangecrab0.2.vhdl | 4 years ago | |
| top-wukong-v2.vhdl | 2 years ago | |
| wukong-v2.xdc | 5 years ago | |