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35e0dbed34 · Merge pull request #353 from tianrui-wei/master · Updated 2 years ago

Branches

fpu-init

9d35340bb1 · fpu: Reduce uninitialised signals · Updated 2 years ago

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Included
loadstore-init

b47b71821e · loadstore1: reduce U state being output · Updated 2 years ago

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core_debug-init

71d4b5ed20 · core_debug: Initialise gspr_index · Updated 2 years ago

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icache-unused-sig

a527d9b959 · core: Remove unused icache_inv signal · Updated 2 years ago

24
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icache-insn-u-state

e7f0a7c7ac · icache: Don't output X on i_out.insn · Updated 2 years ago

24
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dcache-unused-sig

39220be311 · dcache: remove unused do_write signal · Updated 2 years ago

24
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unused-sig

843361f2be · execute1: sub_mux_sel and result_mux_sel are unused · Updated 2 years ago

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divider-init

d3a7517318 · divider: Fix d_out.overflow U state issue · Updated 2 years ago

24
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loadstore-pmu-init

e2438071a1 · loadstore1: Initialise PMU events · Updated 2 years ago

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icache-pmu-events

f06abb67ad · icache: Hook up PMU events · Updated 2 years ago

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fpu-typo

64d2def0c6 · fpu: Fix capitalisation of Execute1ToFPUType · Updated 2 years ago

28
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less-fpga-init

ebdddcc402 · Remove some FPGA style signal inits · Updated 2 years ago

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caravel-mpw6-20220530

2083bc3ed0 · ASIC: Fix multiplier power · Updated 2 years ago

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caravel-mpw5-20220323

907c833521 · Move register stage back after the RAM · Updated 3 years ago

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caravel-mpw5-20220322

5c40143754 · Add a script to post process the Microwatt verilog for caravel · Updated 3 years ago

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alt-reset-address

948f6f43a7 · Allow ALT_RESET_ADDRESS to be overridden · Updated 3 years ago

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Included
log2ceil-issue

b5accb78b2 · wishbone_bram_wrapper ram_addr_bits is 1 bit off · Updated 3 years ago

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fpu-constant

50b4cb9423 · fpu: Make inverse_table a constant · Updated 3 years ago

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asic-3

11c5ac68e8 · Fix caravel script · Updated 3 years ago

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