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35e0dbed34 · Merge pull request #353 from tianrui-wei/master · Updated 8 months ago

Branches

alt-reset-address

948f6f43a7 · Allow ALT_RESET_ADDRESS to be overridden · Updated 11 months ago

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0
Included
asic-3

11c5ac68e8 · Fix caravel script · Updated 1 year ago

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boxarty-20211011

ceb15d3ca8 · Hack to test under verilator · Updated 1 year ago

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cache-tlb-parameters-2

53ccf89d26 · Use a record for cache parameters · Updated 2 years ago

229
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caravel-20210105

3da9642020 · Check in verilog · Updated 2 years ago

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caravel-20210114

f3f159c6dc · Check in verilog · Updated 2 years ago

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caravel-mpw5-20220322

5c40143754 · Add a script to post process the Microwatt verilog for caravel · Updated 11 months ago

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caravel-mpw5-20220323

907c833521 · Move register stage back after the RAM · Updated 11 months ago

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caravel-mpw6-20220530

2083bc3ed0 · ASIC: Fix multiplier power · Updated 8 months ago

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core_debug-init

71d4b5ed20 · core_debug: Initialise gspr_index · Updated 8 months ago

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dcache-nc-fix

b29c58f3d1 · dcache: Loads from non-cacheable PTEs load entire 64 bits · Updated 1 year ago

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dcache-unused-sig

39220be311 · dcache: remove unused do_write signal · Updated 8 months ago

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divider-init

d3a7517318 · divider: Fix d_out.overflow U state issue · Updated 8 months ago

24
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fpu-constant

50b4cb9423 · fpu: Make inverse_table a constant · Updated 11 months ago

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fpu-init

9d35340bb1 · fpu: Reduce uninitialised signals · Updated 8 months ago

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fpu-typo

64d2def0c6 · fpu: Fix capitalisation of Execute1ToFPUType · Updated 8 months ago

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icache-insn-u-state

e7f0a7c7ac · icache: Don't output X on i_out.insn · Updated 8 months ago

24
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icache-pmu-events

f06abb67ad · icache: Hook up PMU events · Updated 8 months ago

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icache-unused-sig

a527d9b959 · core: Remove unused icache_inv signal · Updated 8 months ago

24
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icbi-issue

2d142a6c01 · tests/misc: Add a store/dcbz test · Updated 1 year ago

92
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