litedram: Regenerate from upstream litex

This adds Joel's sdcard feature reporting to the firmware.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
dcache-nc-fix
Anton Blanchard 3 years ago committed by Anton Blanchard
parent 8cdb00652b
commit c0f7f54276

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//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
// Auto-generated by Migen (35203d6) & LiteX (79ac0931) on 2021-08-09 10:54:23 // Auto-generated by Migen (27dbf03) & LiteX (78c1751c) on 2021-08-15 06:19:17
//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
module litedram_core( module litedram_core(
input wire clk, input wire clk,

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//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
// Auto-generated by Migen (35203d6) & LiteX (79ac0931) on 2021-08-09 10:54:20 // Auto-generated by Migen (27dbf03) & LiteX (78c1751c) on 2021-08-15 06:19:10
//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
module litedram_core( module litedram_core(
input wire clk, input wire clk,

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//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
// Auto-generated by Migen (35203d6) & LiteX (79ac0931) on 2021-08-09 10:54:22 // Auto-generated by Migen (27dbf03) & LiteX (78c1751c) on 2021-08-15 06:19:14
//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
module litedram_core( module litedram_core(
input wire clk, input wire clk,

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//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
// Auto-generated by Migen (35203d6) & LiteX (79ac0931) on 2021-08-09 10:54:21 // Auto-generated by Migen (27dbf03) & LiteX (78c1751c) on 2021-08-15 06:19:12
//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
module litedram_core( module litedram_core(
input wire clk, input wire clk,

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//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
// Auto-generated by Migen (35203d6) & LiteX (79ac0931) on 2021-08-09 10:54:25 // Auto-generated by Migen (27dbf03) & LiteX (78c1751c) on 2021-08-15 06:19:19
//-------------------------------------------------------------------------------- //--------------------------------------------------------------------------------
module litedram_core( module litedram_core(
input wire sim_trace, input wire sim_trace,

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