9 Commits (caravel-mpw5-20220323)

Author	SHA1	Message	Date
Benjamin Herrenschmidt	e6cb72fcd9	Add liteeth/build to gitignore ... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>	3 years ago
Michael Neuling	3460afb557	Add yosys builds files to gitignore ... Signed-off-by: Michael Neuling <mikey@neuling.org>	5 years ago
Benjamin Herrenschmidt	183d05de86	gitignore: Add more exlusions ... litedram build directory used by the generator and the verilator obj_dir can be taken out Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>	5 years ago
Michael Neuling	ff162e42eb	Add VHDL TAGS ... Adds `make TAGS` Signed-off-by: Michael Neuling <mikey@neuling.org>	5 years ago
Michael Neuling	9d7df2d507	Add test cases for new exceptions and supervisor state ... This adds test cases for: - sc, illegals and decrementer exceptions - decrementer overflow - rfid - mt/mf sprg0/1 srr0/1 - mtdec - mtmsrd - sc It also adds these test cases to make check/check_light Signed-off-by: Michael Neuling <mikey@neuling.org>	5 years ago
Michael Neuling	54a399f162	gitignore: Fix RAM file name ... From: commit 8e0389b973 Author: Benjamin Herrenschmidt <benh@kernel.crashing.org> Date: Wed Oct 23 12:08:55 2019 +1100 ram: Rework main RAM interface We need to change the name. Signed-off-by: Michael Neuling <mikey@neuling.org>	5 years ago
Michael Neuling	1edc4aa004	Update gitignore for new test bench build files ... Just ignore all *_tb files Signed-off-by: Michael Neuling <mikey@neuling.org>	5 years ago
Michael Neuling	5ae92a721f	Add new files to git ignore ... Signed-off-by: Michael Neuling <mikey@neuling.org>	5 years ago
Anton Blanchard	5a29cb4699	Initial import of microwatt ... Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago