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fpu-init
loadstore-init
core_debug-init
icache-unused-sig
icache-insn-u-state
dcache-unused-sig
unused-sig
divider-init
loadstore-pmu-init
icache-pmu-events
fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
caravel-mpw5-20220322
alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
jtag-port-2
jtag-port
nia-debug
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5 Commits (9d7df2d50768df54503dc400e6c774ad82f02c8e)

Author SHA1 Message Date
Michael Neuling 9d7df2d507 Add test cases for new exceptions and supervisor state 
This adds test cases for:
- sc, illegals and decrementer exceptions
- decrementer overflow
- rfid
- mt/mf sprg0/1 srr0/1
- mtdec
- mtmsrd
- sc

It also adds these test cases to make check/check_light

Signed-off-by: Michael Neuling <mikey@neuling.org>
 5 years ago
Michael Neuling 54a399f162 gitignore: Fix RAM file name 
From:
    commit 8e0389b973
    Author: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Date:   Wed Oct 23 12:08:55 2019 +1100
    ram: Rework main RAM interface

We need to change the name.

Signed-off-by: Michael Neuling <mikey@neuling.org>
 5 years ago
Michael Neuling 1edc4aa004 Update gitignore for new test bench build files 
Just ignore all *_tb files

Signed-off-by: Michael Neuling <mikey@neuling.org>
 5 years ago
Michael Neuling 5ae92a721f Add new files to git ignore 
Signed-off-by: Michael Neuling <mikey@neuling.org>
 5 years ago
Anton Blanchard 5a29cb4699 Initial import of microwatt 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 5 years ago