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fpu-init
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dcache-unused-sig
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divider-init
loadstore-pmu-init
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caravel-mpw6-20220530
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alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
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remove-potato-uart
cache-tlb-parameters-2
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3 Commits (b82d07c8d569494721043d4a9d6d93a22590f335)

Author SHA1 Message Date
Paul Mackerras 0a95e4bfdd tests: Put an attn instruction at 0x700 
This puts an attn instruction at offset 0x700 in each of the tests
so that the test will terminate if a program interrupt is taken.
This means that we can implement the tw instruction to cause a
program interrupt.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago
Anton Blanchard 467630573c Dump CTR, LR and CR on sim termination, and update our tests 
Right now our test cases fold the SPRs into the GPRs. That makes
debugging fails more difficult than it needs to be, so print
out the CTR, LR and CR.

We still need to print the XER, but that is in two spots in microwatt
and will take some more work.

This also adds many instructions to the tests that we have added
lately including overflow instructions, CR logicals and mt/mfxer.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 5 years ago
Anton Blanchard 5a29cb4699 Initial import of microwatt 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 5 years ago