This checks that the store forwarding machinery in the dcache
correctly combines forwarded stores when they are partial stores
(i.e. only writing part of the doubleword, as for a byte store).
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This adds a test with a bdnzl followed immediately by a bdnz, to check
that CTR and LR both get evaluated and written back correctly in this
situation.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
The PVR is a privileged read-only SPR. Test reading and writing in both
supervisor and problem state. In supervisor state reading returns
microwatt's assigned PVR number and writing is a noop. In problem state
both reading and writing cause privileged instruction interrupts.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
Use a more generic console_init() instead of potato_uart_init(),
and do the same for interrupt control. There should be no
change in behaviour.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
The two tests obtain NIA with bl+mflr+addi and then compare it
against addpcis with the minimum and maximum immediate operand values.
They were also tested on a real POWER9 system (in userspace) for good
measure.
Signed-off-by: Shawn Anastasio <shawn@anastas.io>
Paul Mackerras
Jordan Niethe