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fpu-init
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core_debug-init
icache-unused-sig
icache-insn-u-state
dcache-unused-sig
unused-sig
divider-init
loadstore-pmu-init
icache-pmu-events
fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
caravel-mpw5-20220322
alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
jtag-port-2
jtag-port
nia-debug
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1 Commits (f4a52fdc1f9ba42f5b5d543a40caa50290f6d610)

Author SHA1 Message Date
Shawn Anastasio 8b161c6dc6 Add a new misc test suite with addpcis tests 
The two tests obtain NIA with bl+mflr+addi and then compare it
against addpcis with the minimum and maximum immediate operand values.

They were also tested on a real POWER9 system (in userspace) for good
measure.

Signed-off-by: Shawn Anastasio <shawn@anastas.io>
 6 years ago