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fpu-init
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divider-init
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caravel-mpw6-20220530
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alt-reset-address
log2ceil-issue
fpu-constant
asic-3
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remove-potato-uart
cache-tlb-parameters-2
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1 Commits (f54a65f8cf69597d1ebaf9b56f6df33a2e5917a4)

Author SHA1 Message Date
Paul Mackerras 10f4be4309 tests: Add a test for privileged instruction interrupts 
This adds a test that tries to execute various privileged instructions
with MSR[PR] = 1.  This also incidentally tests some of the MSR bit
manipulations.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago