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1fa0b332ca
Mikey points out that our stack grows down from 512kB and our heap is below that too, so we can reduce our BRAM requirements, which allowing some smaller FPGA boards to work. Not sure why I thought we were using memory between 512kB and 1MB. Signed-off-by: Anton Blanchard <anton@linux.ibm.com> |
5 years ago | |
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LICENSE | 5 years ago | |
clk_gen_bypass.vhd | 5 years ago | |
clk_gen_plle2.vhd | 5 years ago | |
firmware.hex | 5 years ago | |
hello_world.hex | 5 years ago | |
nexys-video.xdc | 5 years ago | |
nexys_a7.xdc | 5 years ago | |
nodivide.patch | 5 years ago | |
pp_fifo.vhd | 5 years ago | |
pp_soc_memory.vhd | 5 years ago | |
pp_soc_reset.vhd | 5 years ago | |
pp_soc_uart.vhd | 5 years ago | |
pp_utilities.vhd | 5 years ago | |
toplevel.vhd | 5 years ago |