Commit Graph

6 Commits (5cfa65e836138179ca84d369a9711460411aa88e)

Author SHA1 Message Date
Benjamin Herrenschmidt d564672a82 Regenerate litedram and liteeth
Note: There are a few patches to upstream to fix an upstream breakage
of litedram standalone generator, and fix some issues with liteeth
in the way it's used on Wukong. All these have pending pull requests.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 years ago
Paul Mackerras ca4eb46aea Make wishbone addresses be in units of doublewords or words
This makes the 64-bit wishbone buses have the address expressed in
units of doublewords (64 bits), and similarly for the 32-bit buses the
address is in units of words (32 bits).  This is to comply with the
wishbone spec.  Previously the addresses on the wishbone buses were in
units of bytes regardless of the bus data width, which is not correct
and caused problems with interfacing with externally-generated logic.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
3 years ago
Anton Blanchard c0f7f54276 litedram: Regenerate from upstream litex
This adds Joel's sdcard feature reporting to the firmware.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
Anton Blanchard 780d6c754c litedram: Regenerate from upstream litex
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago
Boris Shingarov 679c547e5f fpga: Add support for Genesys2
Signed-off-by: Boris Shingarov <shingarov@labware.com>
4 years ago
Benjamin Herrenschmidt ac81bb17ac litedram: Regenerate
This regenerate litedram for all targets (genesys2 is new in this
build) using the latest LiteX.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 years ago