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Anton Blanchard 5379b805ec Arty A7 reset pin is C2 ... Use C2 for reset, and fix up a few whitespace issues. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>		7 years ago
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LICENSE	…
arty_a7-35.xdc	Arty A7 reset pin is C2	7 years ago
clk_gen_bypass.vhd	Add dummy clock generator	7 years ago
clk_gen_plle2.vhd	Add and use plle2 primitive for nexys boards	7 years ago
firmware.hex	Add a few more FPGA related files	7 years ago
hello_world.hex	Rebuild hello world assuming a 50MHz clock	7 years ago
nexys-video.xdc	…
nexys_a7.xdc	Add constraint file for Nexys A7	7 years ago
nodivide.patch	Add a few more FPGA related files	7 years ago
pp_fifo.vhd	…
pp_soc_memory.vhd	Fix ghdl build error with pp_soc_memory	7 years ago
pp_soc_reset.vhd	…
pp_soc_uart.vhd	…
pp_utilities.vhd	…
toplevel.vhd	micropython only requires 512kB of BRAM	7 years ago