9 Commits (1206dfe18cf5c5e23a9f93e66a2ac6d86955da04)

Author	SHA1	Message	Date
Anton Blanchard	152261fac8	Remove cycle in writeback ... The pipeline had a cycle in writeback. Writeback is pretty simple and unlikely to be a bottleneck, so lets remove it. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	e69e79d8af	Reformat writeback.vhdl ... Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	50a361a5dc	Exit if we try to write more than one GPR or CR in a cycle ... Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	9fe8d211eb	Register outputs on writeback ... Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	fa04936c92	Add some assertions to writeback ... We want to make sure we never complete more than one instruction per cycle, or write back more than one GPR or CR per cycle. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	fb4cad6eaf	Remove second write port ... We only need two write ports for load with update instructions. Having two write ports just for this instruction is expensive. For now we will force them to be the only instruction in the pipeline, and take two cycles of writeback. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	9fbaea6f08	Rework CR file and add forwarding ... Handle the CR as a single field with per nibble enables. Forward any writes in the same cycle. If this proves to be an issue for timing, we may want to revisit this in the future. For now, it keeps things simple. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	147b259691	Use a better input signal in writeback ... w_in comes from the execution unit, it makes more sense to call it e_in. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago
Anton Blanchard	5a29cb4699	Initial import of microwatt ... Signed-off-by: Anton Blanchard <anton@linux.ibm.com>	5 years ago