1124 Commits (master)
 

Author SHA1 Message Date
Paul Mackerras 35e0dbed34
Merge pull request #353 from tianrui-wei/master 12 months ago
Michael Neuling cd52390bf1
Merge pull request #373 from antonblanchard/icache-insn-u-state 12 months ago
Michael Neuling b983d5080e
Merge pull request #376 from antonblanchard/loadstore-init 12 months ago
Michael Neuling d4db331467
Merge pull request #374 from antonblanchard/icache-unused-sig 12 months ago
Michael Neuling ee5e3778ed
Merge pull request #364 from shenki/readme-updates 12 months ago
Michael Neuling c43692f4c7
Merge pull request #372 from antonblanchard/dcache-unused-sig 12 months ago
Michael Neuling 956df2c863
Merge pull request #371 from antonblanchard/unused-sig 12 months ago
Michael Neuling 3627f102db
Merge pull request #370 from antonblanchard/divider-init 12 months ago
Paul Mackerras 6e1e763c02
Merge pull request #368 from antonblanchard/icache-pmu-events 12 months ago
Anton Blanchard 1047239a37
Merge pull request #377 from antonblanchard/fpu-init 12 months ago
Anton Blanchard 9d35340bb1 fpu: Reduce uninitialised signals 12 months ago
Michael Neuling b82eea5933
Merge pull request #366 from antonblanchard/hello-world-bss 12 months ago
Anton Blanchard d3aff67fa7
Merge pull request #375 from antonblanchard/core_debug-init 12 months ago
Anton Blanchard b47b71821e loadstore1: reduce U state being output 12 months ago
Anton Blanchard 71d4b5ed20 core_debug: Initialise gspr_index 12 months ago
Anton Blanchard a527d9b959 core: Remove unused icache_inv signal 12 months ago
Anton Blanchard e7f0a7c7ac icache: Don't output X on i_out.insn 12 months ago
Anton Blanchard 39220be311 dcache: remove unused do_write signal 12 months ago
Anton Blanchard 843361f2be execute1: sub_mux_sel and result_mux_sel are unused 12 months ago
Anton Blanchard d3a7517318 divider: Fix d_out.overflow U state issue 12 months ago
Anton Blanchard 1ff852b012
Merge pull request #369 from antonblanchard/loadstore-pmu-init 12 months ago
Anton Blanchard e2438071a1 loadstore1: Initialise PMU events 12 months ago
Anton Blanchard b7c4d3c5c3
Merge pull request #367 from antonblanchard/fpu-typo 12 months ago
Anton Blanchard f06abb67ad icache: Hook up PMU events 12 months ago
Anton Blanchard 64d2def0c6 fpu: Fix capitalisation of Execute1ToFPUType 12 months ago
Anton Blanchard ff442d1bdb Zero BSS in hello world test 12 months ago
Anton Blanchard b8fc5636a4
Merge pull request #365 from antonblanchard/less-fpga-init 12 months ago
Anton Blanchard ebdddcc402 Remove some FPGA style signal inits 12 months ago
Anton Blanchard a750365ffa Remove some FPGA style signal inits 12 months ago
Joel Stanley 9ec22af256 README: Add Linux on Microwatt instructions 12 months ago
Joel Stanley a31725d989 README: Add uart to fusesoc instructions 12 months ago
Michael Neuling f5e06c2d4b
Merge pull request #361 from antonblanchard/alt-reset-address 1 year ago
Anton Blanchard 948f6f43a7 Allow ALT_RESET_ADDRESS to be overridden 1 year ago
Michael Neuling 8bf48ac094
Merge pull request #360 from antonblanchard/log2ceil-issue 1 year ago
Anton Blanchard b5accb78b2 wishbone_bram_wrapper ram_addr_bits is 1 bit off 1 year ago
Michael Neuling 30fd936c12
Merge pull request #358 from antonblanchard/unused-sig 1 year ago
Michael Neuling af1b76d944
Merge pull request #356 from antonblanchard/fpu-constant 1 year ago
Michael Neuling 9b96ab730c
Merge pull request #357 from antonblanchard/xics-warning 1 year ago
Anton Blanchard 0b39947f8d Remove unused sequential signal from Fetch1ToIcacheType 1 year ago
Anton Blanchard 00bf0af21c xics: Fix warning when comparing two std_ulogic_vectors 1 year ago
Anton Blanchard 50b4cb9423 fpu: Make inverse_table a constant 1 year ago
Tianrui Wei 844ca0e6b5
fix: fix icache_tb not finishing correctly 1 year ago
Michael Neuling f01f3d233a
Merge pull request #352 from mkj/static-urjtag 1 year ago
Matt Johnston c0c00d05bc mw_debug: Add STATIC_URJTAG flag 1 year ago
Michael Neuling ffcdaaa92d
Update the README Issues (#350) 1 year ago
Michael Neuling b4770197a2
Merge pull request #349 from madscientist159/master 1 year ago
Raptor Engineering Development Team fcb783a0fb Extend LiteDRAM VHDL wrapper to allow more than one clock line 1 year ago
Michael Neuling 2b97fb0bf3
Merge pull request #348 from paulusmack/reduce 1 year ago
Paul Mackerras 0aa898c7a6 xics: Rework the irq_gen process 1 year ago
Paul Mackerras 1720a0584a Use alternative count-leading-zeroes algorithm in the FPU and LSU 1 year ago