matthew1kalasky3
/
microwatt
forked from cores/microwatt
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Commit Graph

  • cb4451498f dcache: Add testbench Benjamin Herrenschmidt 2019-10-19 10:31:39 +1100
  • 742b21480e insn: Simplistic implementation of icbi Benjamin Herrenschmidt 2019-10-22 14:56:31 +1100
  • a0d95e791e insn: Implement isync instruction Benjamin Herrenschmidt 2019-10-22 14:49:35 +1100
  • 6e0ee0b0db icache & dcache: Fix store way variable Benjamin Herrenschmidt 2019-10-17 16:41:19 +1100
  • 587a5e3c45 dcache: Cleanup (mostly cosmetic) Benjamin Herrenschmidt 2019-10-16 15:10:27 +1100
  • 265fbf894b icache/dcache: Make both caches 32 lines, 2 ways Benjamin Herrenschmidt 2019-10-15 16:21:32 +1100
  • 174378b190 dcache: Introduce an extra cycle latency to make timing Benjamin Herrenschmidt 2019-10-10 11:25:16 +1100
  • b513f0fb48 dcache: Add a dcache Benjamin Herrenschmidt 2019-10-10 00:40:46 +1100
  • 7b3df7cb05 icache: Reduce simulation warnings Benjamin Herrenschmidt 2019-10-10 00:40:11 +1100
  • a38ae503ff cache_ram: Add write-enables Benjamin Herrenschmidt 2019-10-10 00:38:03 +1100
  • e598188aca plru: Improve sensitivity list Benjamin Herrenschmidt 2019-10-08 23:26:23 +1100
  • b963f8a6af
         Merge pull request #112 from hughhalf/patch-1 Anton Blanchard 2019-10-21 20:15:37 +1100
  • 96b7f17e52 Minor tweaks to README.md Hugh 2019-10-21 16:51:59 +1100
  • 326dec4b3b
         Merge pull request #110 from antonblanchard/misc Anton Blanchard 2019-10-20 10:09:42 +1100
  • f74e8a4f79 icache_tb: Improve test and include test file Benjamin Herrenschmidt 2019-10-18 16:41:05 +1100
  • 900c131083
         Merge pull request #109 from antonblanchard/misc Anton Blanchard 2019-10-17 17:37:49 +1100
  • e67924f55e isel takes a CR bit, not a CR field Anton Blanchard 2019-10-17 17:16:09 +1100
  • 60b05ee1e5 common: Reformat Benjamin Herrenschmidt 2019-10-16 17:47:08 +1100
  • bddc9327cc execute1: Remove mux on "write_data" and "rc" outputs Benjamin Herrenschmidt 2019-10-16 12:32:45 +1100
  • da0bd89c43 crhelpers: Constraint "crnum" integer Benjamin Herrenschmidt 2019-10-16 12:11:16 +1100
  • 4437487ad0 execute1: Reformat Benjamin Herrenschmidt 2019-10-16 12:28:19 +1100
  • 858b1e7930 writeback: Remove a mux leg on data_in Benjamin Herrenschmidt 2019-10-16 12:05:36 +1100
  • 4433118c91
         Merge pull request #105 from paulusmack/writeback Anton Blanchard 2019-10-17 07:40:36 +1100
  • 57b200d6cb writeback: Eliminate inferred latch Paul Mackerras 2019-10-16 07:56:15 +1100
  • 640af89e72
         Merge pull request #106 from paulusmack/master Anton Blanchard 2019-10-15 21:05:10 +1100
  • a27ed0ec27 wishbone_debug_master: Improve timing Paul Mackerras 2019-10-15 18:16:07 +1100
  • f49a5a99a5 Remove execute2 stage Paul Mackerras 2019-10-15 16:26:36 +1100
  • 63f5dce820
         Merge pull request #104 from paulusmack/master Anton Blanchard 2019-10-15 16:17:12 +1100
  • 9646fe28b0 Do sign-extension instructions in writeback instead of execute1 Paul Mackerras 2019-10-14 14:39:23 +1100
  • 374f4c536d writeback: Do data formatting and condition recording in writeback Paul Mackerras 2019-10-14 12:56:01 +1100
  • 45271acb35
         Merge pull request #103 from paulusmack/divider Anton Blanchard 2019-10-15 15:20:34 +1100
  • 86c53aa3f7 Implement neg using OP_ADD Paul Mackerras 2019-10-14 16:02:45 +1100
  • 82c19d4e7a divider: Reduce delay in detecting 32-bit overflow Paul Mackerras 2019-10-15 14:59:15 +1100
  • 6c4edf80ae
         Merge pull request #102 from antonblanchard/gpr-hazard-5-c Anton Blanchard 2019-10-15 12:49:06 +1100
  • 813f834012 Add CR hazard detection Anton Blanchard 2019-10-15 11:22:59 +1100
  • 58b348deae
         Merge pull request #101 from antonblanchard/gpr-hazard-5-b Anton Blanchard 2019-10-15 11:22:48 +1100
  • c7025f9f28 divider: Add an output register Paul Mackerras 2019-10-15 10:29:53 +1100
  • bb65d0b899 Remove issue restrictions on a number of instructions Anton Blanchard 2019-10-14 16:20:07 +1100
  • bdc26b7527 Add GPR hazard detection Anton Blanchard 2019-10-14 13:27:45 +1100
  • e4c98dce36
         Merge pull request #100 from antonblanchard/gpr-hazard-5-a Anton Blanchard 2019-10-15 09:02:56 +1100
  • f181bf31e2
         Merge pull request #99 from paulusmack/logical Anton Blanchard 2019-10-14 13:14:04 +1100
  • d5346d0abf Separate issue control into its own unit Anton Blanchard 2019-10-14 12:40:23 +1100
  • 4396eddc31 countzero: Add a testbench Paul Mackerras 2019-10-10 15:09:41 +1100
  • e527e3a9b7 countzero: Reorganize to have fewer levels of logic and fewer LUTs Paul Mackerras 2019-10-11 16:06:01 +1100
  • 0a0fe03767
         Merge pull request #98 from antonblanchard/fix-mod Anton Blanchard 2019-10-13 22:10:18 +1100
  • 10a990bba8 mod* doesn't have an RC form Anton Blanchard 2019-10-13 21:42:27 +1100
  • 56908edea2
         Merge pull request #96 from antonblanchard/clk_gen_bypass-fix Anton Blanchard 2019-10-13 15:36:37 +1100
  • 6cdb8ca9f5 Fix clk_gen_bypass Anton Blanchard 2019-10-13 14:41:53 +1100
  • 8530500a71
         Merge pull request #94 from antonblanchard/icbi-nop Anton Blanchard 2019-10-13 13:30:52 +1100
  • 854c93f970
         Merge pull request #93 from antonblanchard/fifo-fix Anton Blanchard 2019-10-13 13:11:46 +1100
  • c41da84226 decode: Handle icbi Anton Blanchard 2019-10-13 12:59:14 +1100
  • 7aaed5abd5 fifo: Reformat Anton Blanchard 2019-10-13 12:57:23 +1100
  • ad6c6790f9 fifo: Remove shared variable Anton Blanchard 2019-10-13 12:52:39 +1100
  • bd73c1753b
         Merge pull request #92 from paulusmack/divider Anton Blanchard 2019-10-12 22:23:10 +1100
  • 625eb0175f
         Merge pull request #91 from tgingold/gpr-file-fix Anton Blanchard 2019-10-12 22:18:37 +1100
  • d4f51e08c8 divider: Return 0 for invalid and overflow cases, like P9 does Paul Mackerras 2019-10-11 15:16:47 +1100
  • 5c0ba90722 decode2: Fix 32-bit flag passed to divider Paul Mackerras 2019-10-12 16:15:20 +1100
  • 0169d48ee6 Fix register file size (there are 32 gprs). Tristan Gingold 2019-10-12 06:56:32 +0200
  • bbb1a3610c
         Merge pull request #84 from classilla/master Anton Blanchard 2019-10-11 16:47:37 +1100
  • 460447a31b
         Merge pull request #89 from mikey/gitignore Anton Blanchard 2019-10-11 16:46:03 +1100
  • 23f8702e68
         Merge pull request #90 from antonblanchard/newcrf-inferred-latch Anton Blanchard 2019-10-11 16:45:45 +1100
  • 57b7f1ed71 Don't infer latch for newcrf Anton Blanchard 2019-10-11 16:31:14 +1100
  • 1edc4aa004 Update gitignore for new test bench build files Michael Neuling 2019-10-11 16:02:04 +1100
  • f76b5f9ea2
         Merge pull request #87 from antonblanchard/cmod-a7-freq Anton Blanchard 2019-10-10 21:29:06 +1100
  • 9b8c094cf6 Fix cmod-a7 frequency Anton Blanchard 2019-10-10 20:59:49 +1100
  • 16ca868909
         Merge pull request #86 from antonblanchard/outstanding-range Anton Blanchard 2019-10-10 20:32:47 +1100
  • 938b453501
         Merge pull request #85 from antonblanchard/leadingzeroes-fix Anton Blanchard 2019-10-10 17:56:55 +1100
  • e54db5b496
         Merge pull request #79 from deece/uart_address Anton Blanchard 2019-10-10 17:47:15 +1100
  • 4016f69e70 Limit outstanding range Anton Blanchard 2019-10-10 17:14:55 +1100
  • 1b559aee31 Fix count-leading/trailing-zeroes Anton Blanchard 2019-10-10 14:36:23 +1100
  • 07d3c8e4de Add logo to README.md Cameron Kaiser 2019-10-08 21:00:00 -0700
  • 0cb0f78777 Add title image Cameron Kaiser 2019-10-08 20:57:20 -0700
  • 3c6e66dc96
         Merge pull request #83 from paulusmack/logical Anton Blanchard 2019-10-09 12:33:17 +1100
  • 4b7b702e01
         Merge pull request #81 from antonblanchard/logical Anton Blanchard 2019-10-09 11:49:24 +1100
  • 5dff75219c
         Merge pull request #82 from antonblanchard/icache-set-assoc Anton Blanchard 2019-10-09 11:47:30 +1100
  • 24a4a796ce execute: Consolidate count-leading/trailing-zeroes implementations Paul Mackerras 2019-10-09 08:55:43 +1100
  • b8fb721b81 Consolidate logical instructions Anton Blanchard 2019-10-08 18:46:01 +1100
  • ccd52bf6f2 Tighten UART address Alastair D'Silva 2019-10-03 10:16:53 +1000
  • b56b46b7d1 icache: Set associative icache Benjamin Herrenschmidt 2019-10-02 22:17:31 +1000
  • 004eb074c9 plru: Add a simple PLRU module Benjamin Herrenschmidt 2019-10-02 19:06:53 +1000
  • e1cf44cec8 fetch2: Remove blank line Benjamin Herrenschmidt 2019-10-02 16:17:42 +1000
  • d40c1c1a25 icache: Use narrower block RAMs Benjamin Herrenschmidt 2019-09-30 18:17:10 +1000
  • d415e5544a fetch/icache: Fit icache in BRAM Benjamin Herrenschmidt 2019-09-27 13:23:56 +1000
  • 3589f92d5a fetch1: Simplify a bit Benjamin Herrenschmidt 2019-10-01 14:24:07 +1000
  • fb01dc8a90 icache: Reformat icache Benjamin Herrenschmidt 2019-09-25 16:50:24 +1000
  • 3a2c4b8978
         Merge pull request #78 from paulusmack/new-decode Anton Blanchard 2019-10-08 10:20:22 +1100
  • f7c393ba7e Add a rotate/mask/shift unit and use it in execute1 Paul Mackerras 2019-10-07 18:26:11 +1100
  • 90b6e27380 Generalize the mul_32bit and mul_signed fields of decode_rom_t Paul Mackerras 2019-10-06 15:21:27 +1100
  • 7fe84220a5 decode: Avoid multiplexing from instruction reg fields to regfile address ports Paul Mackerras 2019-10-04 19:26:37 +1000
  • 96b402a4bf Consolidate add/subtract instructions into a single op Paul Mackerras 2019-10-04 16:11:21 +1000
  • f1ac8894b1
         Merge pull request #80 from antonblanchard/misc Anton Blanchard 2019-10-04 10:32:13 +1000
  • b0f302ecf4 decode: Make all update-form indexed loads and stores use RA_OR_ZERO Paul Mackerras 2019-10-04 08:25:53 +1000
  • ec1868f7d2 register_file: Move GPRs into distributed RAM Benjamin Herrenschmidt 2019-10-03 12:38:49 +1000
  • 58b06eb5f3 decode: Remove const fields from decode_rom_t Paul Mackerras 2019-10-02 22:21:09 +1000
  • a2969fa298 debug/sim: Make connect/disconnect messages quieter Benjamin Herrenschmidt 2019-10-02 09:58:44 +1000
  • 143d0ae9e4 decode: Fix larx/stcx instructions to use RA_OR_ZERO not RA Paul Mackerras 2019-10-01 15:49:07 +1000
  • bbae2d1eda decode: Index minor op table with insn bits for opcode 31 Paul Mackerras 2019-09-30 15:03:06 +1000
  • 21d3f8a5ed decode: Index minor op table with insn bits for opcode 30 Paul Mackerras 2019-09-29 16:41:52 +1000
  • 00e9f801f6 decode: Index minor op table with insn bits for opcode 19 Paul Mackerras 2019-09-29 16:26:07 +1000
  • e30a87593a decode: Start moving towards decoding by major opcode first Paul Mackerras 2019-09-29 09:17:39 +1000